27S65A Search Results

p-iris control

Contextual Info: Am27S65 Am27S65 4096-Bit 1 0 2 4 x 4 Bipolar Registered PROM with SSR Diagnostics Capability DISTINCTIVE CHARACTERISTICS On-chip diagnostic shift register for serial observability and controllability of the output register User-programmable Enable Pin for Asynchronous or

29MA16

Abstract: am27s47a AM27S45a AM27S45s Am27S85 Am27LS291 AM27S85A CD3024 PD3024
Contextual Info: A m P A L * H C 2 9 M A 16 /A m P A L H C T 2 9 M A 16 24-Pin E2-Based CMOS Programmable Array Logic ADVANCE INFORMATION • • • • H igh-perform ance sem i-custom logic replacem ent; E lectrically Erasable E2 technology allows repro­ gram mability

27S55A

Contextual Info: AmPAL* HC29MA16/AmPALHCT29MA16 24-Pin E2-Based C M O S Programmable Array Logic A D VA N C E INFORMATION • Register/Latch PR E L O A D permits full logical verifica­ tion • Available in high-speed tpo “ 35 ns, fMAX = 20 MHz and standard-speed (tpo ” 45 ns, fMAX “ 15.0 MHz)

Contextual Info: Am 27S65 Am27S65 4096-Bit 1 0 2 4 x 4 Bipolar Registered PROM with SSR Diagnostics Capability DISTINCTIVE CHARACTERISTICS • • • • On-chip diagnostic shift register for serial observability and controllability of the output register User-programmable Enable Pin for Asynchronous or

Contextual Info: Am 27S65 Am27S65 4096-Bit 1 0 2 4 x 4 Bipolar Registered PROM with SSR Diagnostics Capability DISTINCTIVE CHARACTERISTICS • • • • On-chip diagnostic shift register for serial observability and controllability of the output register User-programmable Enable Pin for Asynchronous or

Contextual Info: Am27S65 4096-Bit 1 0 2 4 x 4 Bipolar Registered PROM with SSR Diagnostics Capability DISTINCTIVE CHARACTERISTICS • • • • On-chip diagnostic shift register for serial observability and controllability of the output register User-programmable Enable Pin for Asynchronous or

af0001

Contextual Info: Am27S65 4096-Bit 1 0 2 4 x 4 Bipolar Registered PROM with SSR Diagnostics Capability • • • • On-chip diagnostic shift register for serial observability and controllability of the output register User-programmable Enable Pin for Asynchronous or