27 MHZ RECEIVER Search Results

marking 3 pin A1p

Contextual Info: SN65LVDS822 www.ti.com SLLSEE8 – SEPTEMBER 2013 FLATLINK LVDS RECEIVER Check for Samples: SN65LVDS822 FEATURES 1 • • • • • 4:27 LVDS-to-CMOS Deserializer Pixel Clock Range of 4 MHz to 54 MHz, for Resolutions of 160x120 to 1024x600 Special 2:27 Mode With 14x Sampling Allows

Contextual Info: SN65LVDS822 www.ti.com SLLSEE8 – SEPTEMBER 2013 FLATLINK LVDS RECEIVER Check for Samples: SN65LVDS822 FEATURES 1 • • • • • 4:27 LVDS-to-CMOS Deserializer Pixel Clock Range of 4 MHz to 54 MHz, for Resolutions of 160x120 to 1024x600 Special 2:27 Mode With 14x Sampling Allows

DC-27

Abstract: SCLF-27 YY161
Contextual Info: SCLF-27+ SCLF-27 Surface Mount Low Pass Filter 50Ω DC to 27 MHz Features Maximum Ratings Operating Temperature -40°C to 85°C Storage Temperature -55°C to 100°C RF Power Input 0.5W max. • wide selection of cut-off frequencies • excellent rejection

db1n

Abstract: DC-27 SCLF-27 YY161
Contextual Info: Surface Mount SCLF-27+ SCLF-27 Low Pass Filter 50Ω DC to 27 MHz Features Maximum Ratings Operating Temperature -40°C to 85°C Storage Temperature • wide selection of cut-off frequencies • excellent rejection • custom models available -55°C to 100°C

100119

Abstract: DC-27 SCLF-27 YY161
Contextual Info: SCLF-27+ SCLF-27 Surface Mount Low Pass Filter 50Ω DC to 27 MHz Maximum Ratings Operating Temperature -40°C to 85°C Storage Temperature -55°C to 100°C RF Power Input 0.5W max. Features • wide selection of cut-off frequencies • excellent rejection

HIGH VOLTAGE ISOLATION DZ 2101

Abstract: HIGH VOLTAGE ISOLATION DZ 2101 PEAK DETECTOR CIRC DZ 2101 lm1872 circuit diagram for simple IR robots LM1871 pf 2102 vts 455 khz if transformer HIGH VOLTAGE ISOLATION DP 2101 PEAK DETECTOR CIRC TOKO 10K
Contextual Info: LM1872 2 3 National Semiconductor LM1872 Radio Control Receiver/Decoder General Description Features The LM1872 is a complete RF receiver/decoder for radio control applications. The device is well suited for use at ei­ ther 27 MHz, 49 MHz or 72 MHz in controlling various toys

circuit diagram for simple IR robots

Abstract: LM1871 LM1872 455 khz if transformer pin diagram 7912 TRANSISTOR 7912 remote control toy car circuit diagram using ir TOKO 10 EZC TOKO 10K 7912 TO-3 7912
Contextual Info: LM1872 Radio Control Receiver Decoder General Description Features The LM1872 is a complete RF receiver decoder for radio control applications The device is well suited for use at either 27 MHz 49 MHz or 72 MHz in controlling various toys or hobby craft such as cars boats tanks trucks robots

14.5 MHz crystal filter

Abstract: 948F NB3N508S NB3N508SDTG NB3N508SDTR2G tssop-16
Contextual Info: NB3N508S 3.3V, 216 MHz PureEdge VCXO Clock Generator with M−LVDS Output Description The NB3N508S is a high precision, low phase noise Voltage Controlled Crystal Oscillator VCXO and phase lock loop (PLL) that generates 216 MHz M−LVDS output from a 27 MHz crystal. The

CK505

Abstract: sl28 lathes DOT96 PCI33 LCD1001 SL28640 SE286
Contextual Info: SL28640 Clock Generator for Intel Cantiga Chipset Features • 33 MHz PCI clock • 27 MHz Video clocks • Compliant to Intel CK505 • Low power push-pull type differential output buffers • Integrated voltage regulator • Buffered Reference Clock 14.318 MHz

CY28548

Abstract: 100C CK505 DOT96 LCD1001 SL28548ATC-2
Contextual Info: SL28548-2 Clock Generator for Intel Crestline Chipset Features • 33 MHz PCI clock • 27 MHz Video clocks • Compliant to Intel CK505 • Low power push-pull type differential output buffers • Integrated voltage regulator • Buffered Reference Clock 14.318 MHz

Contextual Info: ASX415 250 ~ 4000 MHz MMIC Amplifier 4 Features Description  14 dB Gain at 2000 MHz  27 dBm P1dB at 2000 MHz  42 dBm OIP3 at 2000 MHz  ACLR @ WCDMA 4FA: -51 dBc @ Pout = +13 dBm, +/- 5 MHz offset  MTTF > 100 Years  Single Supply The ASX415, a power amplifier MMIC, has a high

Contextual Info: SN65LVDS822 www.ti.com SLLSEE8A – SEPTEMBER 2013 – REVISED OCTOBER 2013 FLATLINK LVDS RECEIVER Check for Samples: SN65LVDS822 FEATURES 1 • • 2 • • • • • 4:27 LVDS-to-CMOS Deserializer Pixel Clock Range of 4 MHz to 54 MHz, for Resolutions of 160x120 to 1024x600

PCK2001

Abstract: PCK2001M
Contextual Info: INTEGRATED CIRCUITS PCK2001M 14.318-150 MHz I2C 1:10 Clock Buffer Product specification Supersedes data of 1998 Oct 27 Philips Semiconductors 1999 Jul 06 Philips Semiconductors Product specification 14.318–150 MHz I2C 1:10 Clock Buffer PCK2001M • 175 ps skew outputs

Contextual Info: SN65LV1023A SN65LV1224B www.ti.com SLLS621E – SEPTEMBER 2004 – REVISED DECEMBER 2009 10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER Check for Samples: SN65LV1023A SN65LV1224B FEATURES 1 APPLICATIONS AVCC DVCC DVCC DIN1 32 31 30 29 28 27 26 25 24 1

Contextual Info: SN65LV1023A SN65LV1224B www.ti.com SLLS621E – SEPTEMBER 2004 – REVISED DECEMBER 2009 10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER Check for Samples: SN65LV1023A SN65LV1224B FEATURES 1 APPLICATIONS AVCC DVCC DVCC DIN1 32 31 30 29 28 27 26 25 24 1

Contextual Info: SN65LV1023A SN65LV1224B www.ti.com SLLS621E – SEPTEMBER 2004 – REVISED DECEMBER 2009 10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER Check for Samples: SN65LV1023A SN65LV1224B FEATURES 1 APPLICATIONS AVCC DVCC DVCC DIN1 32 31 30 29 28 27 26 25 24 1

LCD100C

Abstract: CK505 DOT96 SRC11 SL28641-2 OE10E
Contextual Info: SL28641/ SL28641-2 PRELIMINARY CONFIDENTIAL Clock Generator for Intel Cantiga Chipset Features • 33 MHz PCI clock • 27 MHz Video clocks • Compliant to Intel CK505 • Low power push-pull type differential output buffers • Integrated voltage regulator

Contextual Info: SME1400B-17 Broadband Surface Mount Mixer Product Features • • • • • • • • +27 dBm Input IP3 RF: 1 – 2200 MHz LO: 1 – 2200 MHz IF: 1 – 2000 MHz +17 dBm LO Drive Level No Internal Solder Connections RoHS-compliant SMT package No External Bias Required

SL28506BZC

Abstract: SL28506-2 SL28506BZC-2T ck505 crystal cut 25MHz lathes 1394B CK505 DOT96 SL28506BZC2T SL28506BOC-2
Contextual Info: SL28506-2 Clock Generator for Intel Eaglelake Chipset Features • 33 MHz PCI clock • 25 MHz WOL or PATA clock on SE • Compliant to Intel CK505 • 27 MHz non-spread Video Clock on SE • Selectable CPU frequencies • SRC clocks compliant to PCI-Express Gen2 except

1400B

Contextual Info: SME1400B-17 Broadband Surface Mount Mixer Product Features • • • • • • • • +27 dBm Input IP3 RF: 1 – 2200 MHz LO: 1 – 2200 MHz IF: 1 – 2000 MHz +17 dBm LO Drive Level No Internal Solder Connections RoHS-compliant SMT package No External Bias Required

SL28506BZC

Abstract: 75902 lathes 1394B CK505 DOT96 SRC11
Contextual Info: SL28506 Clock Generator for Intel Eaglelake Chipset Features • 33 MHz PCI clock • 25 MHz WOL or PATA clock on SE pin • Compliant to Intel CK505 • 27 MHz non-spread Video Clock on SE pin • Selectable CPU frequencies • SRC clocks compliant to PCI-Express Gen2 except

PCA5000T

Abstract: UAA2050T UHF FM receiver 470 IEC134 S028 Digital Oscilloscope Preamplifier UHF receiver philips
Contextual Info: Philips Semiconductors Product specification Low power digital UHF paging receiver UAA2050T GENERAL DESCRIPTION The UAA2050T is a very low power UHF and VHF radio receiver circuit, primarily intended tor use in paging receivers 27 MHz to 470 MHz for wide-area digital paging systems employing direct FM non-return-to-zero (NRZ) frequency-shift

NB3N3020DTG

Abstract: 948F NB3N3020DTR2G clock multiplier TTL 60 duty cycle
Contextual Info: NB3N3020 3.3 V, LVPECL/LVCMOS Clock Multiplier Description The NB3N3020 is a high precision, low phase noise selectable clock multiplier. The device takes a 5 – 27 MHz fundamental mode parallel resonant crystal or a 2 − 210 MHz LVCMOS single ended clock source

Contextual Info: AN11357 BGU8009 Matching Options for 850 MHz / 2400 MHz Jammer Immunity Rev. 1 — 27 May 2013 Application Note Document information Info Content Keywords LNA, GNSS, GPS, BGU8009, WLAN, GSM-850, GSM-900 Abstract This document describes an alternative input matching option for the