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    266 XNOR GATE Search Results

    266 XNOR GATE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    54S133/BEA
    		Rochester Electronics LLC 54S133 - NAND GATE, 13-INPUT - Dual marked (M38510/07009BEA) PDF Buy
    54ACTQ32/QCA
    		Rochester Electronics LLC 54ACTQ32 - OR Gate, ACT Series, 4-Func, 2-Input, CMOS, - Dual marked (5962-8973601CA) PDF Buy
    5409/BCA
    		Rochester Electronics LLC 5409 - AND GATE, QUAD 2-INPUT, WITH OPEN-COLLECTOR OUTPUTS - Dual marked (M38510/01602BCA) PDF Buy
    54HC30/BCA
    		Rochester Electronics LLC 54HC30 - 8-Input NAND Gates - Dual marked (M38510/65004BCA) PDF Buy
    54F21/BCA
    		Rochester Electronics LLC 54F21 - AND GATE, DUAL 4-INPUT - Dual marked (5962-8955401CA) PDF Buy

    266 XNOR GATE Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    sn74hc48

    Abstract: SN74HC266N
    Contextual Info: SN54HC266, SN74HC266 QUADRUPLE 2ĆINPUT EXCLUSIVEĆNOR GATES WITH OPENĆDRAIN OUTPUTS SCLS135F − DECEMBER 1982 − REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V D High-Current Inverting Outputs Drive Up To 10 LSTTL Loads D Low Power Consumption, 20-µA Max ICC


    Original     		SN54HC266, SN74HC266 SCLS135F SN54HC266 SN74HC266 scyd013 sdyu001x sgyc003d SN74HC4851/HC4852 sn74hc48 SN74HC266N PDF

    TA138

    Abstract: DLM8 TPC-ALS-249 TPC1020B 4584P TA273 CNT4A
    Contextual Info: TPC10 SERIES CMOS FIELD-PROGRAMMABLE GATE ARRAYS S R FS 001F - D3864, DECEM BER 19B9 - R EVISED FEBRUARY 1993 • • Four Arrays With up to 2000 Usable Equivalent Gates Tl Action Logic System TI-ALS Software for: - ViewLogic™ - Mentor™ - OrCAD/SDT III ™


    OCR Scan     		TPC10 D3864, 4-to-16 DEC4X16A TA164 TA194 TA195 0-P15 TA138 DLM8 TPC-ALS-249 TPC1020B 4584P TA273 CNT4A PDF

    tag 8634

    Abstract: TOP 242 PN C15-32 LT 7232 FR 220 em-18 gi 9232 GP32 gx16 SDH 209
    Contextual Info: ST122 DSP CORE REFERENCE GUIDE Release 1.0 ST122 Implementation 1.0 1/408 2/408 ST122 DSP CORE REFERENCE GUIDE TABLE OF CONTENTS TABLE OF CONTENTS 1 PAGE ST122 OVERVIEW .


    Original     		ST122 ST100 ST122CRG tag 8634 TOP 242 PN C15-32 LT 7232 FR 220 em-18 gi 9232 GP32 gx16 SDH 209 PDF

    8 bit full adder

    Abstract: LD78 CDUD4 CBU12 266 XnOR GATE BI48 CBD12 FD51 mux24 MUX82
    Contextual Info: ispLSI Macro Library Reference Manual Version 8.2 Technical Support Line: 1-800-LATTICE or 408 826-6002 IDE-ISPML-RM 8.2.1 Copyright This document may not, in whole or part, be copied, photocopied, reproduced, translated, or reduced to any electronic medium or machine-readable form without


    Original     		1-800-LATTICE licT38 SRR11 SRR14 SRR18 SRR21 SRR24 SRR28 SRR31 SRR34 8 bit full adder LD78 CDUD4 CBU12 266 XnOR GATE BI48 CBD12 FD51 mux24 MUX82 PDF

    EP610

    Abstract: EP900I programming manual EP910 H123A EPM5064 FLIPFLOP SCHEMATIC EP1810 EP600I EP910 Max Plus II Tutorial
    Contextual Info: 81_GSBOOK.fm5 Page 277 Tuesday, October 14, 1997 4:04 PM Appendix A MAX+PLUS II Command-Line Mode You can operate the MAX+PLUS II Compiler, Timing Analyzer, and Simulator from the command prompt under UNIX, Microsoft Windows NT, and Microsoft Windows 95. Altera Corporation


    Original     		PDF

    PT43C

    Abstract: PR41C pin diagram of ic 7495 shift register CORE F5A Y 928 K00 064 PT42C 21-INPUT pr46c OR4E10 k72 u2
    Contextual Info: Preliminary Data Sheet August 2000 ORCA Series 4 Field-Programmable Gate Arrays Programmable Features • ■ High-performance platform design. — 0.13 µm seven-level metal technology. — Internal performance of >250 MHz four logic levels . — I/O performance of >416 MHz for all user I/Os.


    Original     		DS00-221FPGA PT43C PR41C pin diagram of ic 7495 shift register CORE F5A Y 928 K00 064 PT42C 21-INPUT pr46c OR4E10 k72 u2 PDF

    SCH5017-NW

    Abstract: SCH5017 SMSC SCH5017 a8000B marking codes ER diode SMB sch5 assembly instruction 27266 HP-95LX DIODE GP54
    Contextual Info: SCH5017 Super I/O with Temperature Sensing, Quiet Auto Fan and Glue Logic PRODUCT FEATURES „ General Features — — — — — — — — — — — „ „ „ Datasheet „ 3.3 Volt Operation SIO Block is 5 Volt Tolerant LPC Interface Programmable Wake-up Event Interface


    Original     		SCH5017 PC2001 SCH5017 SCH5017-NW SMSC SCH5017 a8000B marking codes ER diode SMB sch5 assembly instruction 27266 HP-95LX DIODE GP54 PDF

    SCH5017

    Abstract: 277 FAN SMSC SCH5017 SCH5017-NW intel desktop board SERVICE MANUAL regulator handbook 8042 "Keyboard Controller" address 12021 floppy disk controller HP-95LX
    Contextual Info: SCH5017 Super I/O with Temperature Sensing, Quiet Auto Fan and Glue Logic PRODUCT FEATURES • General Features — — — — — — — — — — — ■ ■ ■ Datasheet ■ 3.3 Volt Operation SIO Block is 5 Volt Tolerant LPC Interface Programmable Wake-up Event Interface


    Original     		SCH5017 PC2001 SCH5017 277 FAN SMSC SCH5017 SCH5017-NW intel desktop board SERVICE MANUAL regulator handbook 8042 "Keyboard Controller" address 12021 floppy disk controller HP-95LX PDF

    block diagram for automatic room power control

    Abstract: ic for level shifter 8-SOIC 0.01 micro farad capacitor data sheet AM MODULATOR USING PLL circuit collection opamp CY8C24xxx GDI PUMP DRIVE circuit diagram of 16-1 multiplexer and explain schematic CIRCUIT DIAGRAM 3 phase analog power 0.1 micro farad capacitor data sheet
    Contextual Info: CY8C24123, CY8C24223, CY8C24423 PSoC Mixed Signal Array Preliminary Data Sheet For Silicon Revision A October 14, 2003 Cypress MicroSystems 2700 162nd Street SW Building D Lynnwood, WA 98037 Phone: 800.669.0557 FAX: 425.787.4641 http://www.cypress.com Document No. 38-12011 Rev. *C


    Original     		CY8C24123, CY8C24223, CY8C24423 162nd CY8C24xxx block diagram for automatic room power control ic for level shifter 8-SOIC 0.01 micro farad capacitor data sheet AM MODULATOR USING PLL circuit collection opamp GDI PUMP DRIVE circuit diagram of 16-1 multiplexer and explain schematic CIRCUIT DIAGRAM 3 phase analog power 0.1 micro farad capacitor data sheet PDF

    6N0 953 235

    Contextual Info: Preliminary Data Sheet microelectronics group Lucent Technologies Bell Labs Innovations ORCA OR3Cxx 5 V and OR3Txxx (3.3 V) Series Field-Programmable Gate Arrays Features • High-performance, cost-effective, 0.35 nm 4-level metal technology, with a migration plan to 0.25 urn


    OCR Scan     		16-bit 208-Pin 240-Pin 256-Pin 352-Pin 432-Pin 600-Pin PS208 PS240 BA256 6N0 953 235 PDF

    k1377

    Abstract: MPA1064DH B1582 M20214 MPA1064KE MPA1016DD MPA1016FN MPA1000 MPA1036DH MPA1036FN
    Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MPA1000 Product Description future design migration efforts. The combination of automatic tools and gate level architecture is ideal for traditional schematic driven or high level language based design methodologies. In fact, logic synthesis tools were originally


    Original     		MPA1000 RS232 33MHz X11r5 DL201 k1377 MPA1064DH B1582 M20214 MPA1064KE MPA1016DD MPA1016FN MPA1036DH MPA1036FN PDF

    D108051

    Abstract: LPC47N350-NE lpc47n350-nu delta dps 298 cp mbx 171 rev 1.0 lm7412 ps2 CIRCUIT power diagram motherboard 993 AN rv13
    Contextual Info: LPC47N350 Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface Datasheet Product Features • ■ ■ ■ ■ ■ ■ ■ ■ 3.3V Operation with 5V Tolerant Buffers ACPI 2.0 PC2001 Compliant LPC Interface with Clock Run Support — Decode I/O, Memory, and FWH cycles


    Original     		LPC47N350 MC146818 DS1287 128Byte 4x32-Byte 24-Hour 8584-Style LPC47N350 D108051 LPC47N350-NE lpc47n350-nu delta dps 298 cp mbx 171 rev 1.0 lm7412 ps2 CIRCUIT power diagram motherboard 993 AN rv13 PDF

    circuit diagram of full subtractor circuit

    Abstract: 266 XnOR GATE full subtractor circuit using nor gates CBD41 LD74 0-99 counter by using 4 dual jk flip flop xnor ne 5555 timer gray code 2-bit down counter LD78
    Contextual Info: ispLSI Macro Library Reference Manual Version 8.0 Technical Support Line: 1-800-LATTICE or 408 428-6414 DSNEXP-ISPML-RM 8.0.1 Copyright This document may not, in whole or part, be copied, photocopied, reproduced, translated, or reduced to any electronic medium or machine-readable form without


    Original     		1-800-LATTICE RF8X16 SPSR8X16 SRR11 SRR14 SRR18 SRR21 SRR24 SRR28 SRR31 circuit diagram of full subtractor circuit 266 XnOR GATE full subtractor circuit using nor gates CBD41 LD74 0-99 counter by using 4 dual jk flip flop xnor ne 5555 timer gray code 2-bit down counter LD78 PDF

    SN74HC02 Spice model

    Abstract: philips semiconductor data handbook SDAD001C SDFD001B SCAD001D SN7497 spice model SN74AHC14 spice Transistor Crossreference SLLS210 ci ttl sn74ls00
    Contextual Info: LOGIC OVERVIEW 1 FUNCTIONAL INDEX 2 FUNCTIONAL CROSSĆREFERENCE 3 DEVICE SELECTION GUIDE 4 3 LOGIC SELECTION GUIDE FIRST QUARTER 1997 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest


    Original     		PDF

    SCH3114

    Abstract: INTEL 8042 LPC47M292 SCH3114I-NU 8042 kbc SCH3112I-NU 8042 pinout SCH3116 NDIR CO sensor 8042 "Keyboard Controller"
    Contextual Info: SCH3112, SCH3114, SCH3116 LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports PRODUCT FEATURES • General Features — — — — — — — — — — — — — ■ ■ ■ ■ 3.3 Volt Operation SIO Block is 5 Volt Tolerant Low Pin Count Bus (LPC) Interface


    Original     		SCH3112, SCH3114, SCH3116 PC2001 SCH311X SCH3114 INTEL 8042 LPC47M292 SCH3114I-NU 8042 kbc SCH3112I-NU 8042 pinout SCH3116 NDIR CO sensor 8042 "Keyboard Controller" PDF

    SCH3114I-NE

    Abstract: SCH311X sch3112-nu SCH3114-NE SCH3114 smsc super io 277 operationn LPC47M292 8042 Keyboard Controller program diode gp15 m
    Contextual Info: SCH3112, SCH3114, SCH3116 LPC IO with 8042 KBC, Reset Generation, HWM and Multiple Serial Ports PRODUCT FEATURES • General Features — — — — — — — — — — — — — ■ ■ ■ ■ 3.3 Volt Operation SIO Block is 5 Volt Tolerant Low Pin Count Bus (LPC) Interface


    Original     		SCH3112, SCH3114, SCH3116 PC2001 SCH311X SCH3114I-NE SCH311X sch3112-nu SCH3114-NE SCH3114 smsc super io 277 operationn LPC47M292 8042 Keyboard Controller program diode gp15 m PDF

    SCH3106

    Abstract: SCH3106-NU 3032H 2322 660 91008
    Contextual Info: SCH3106 LPC IO with Multiple Serial Ports, 8042 KBC, Reset Generation, and Hardware Monitoring PRODUCT FEATURES „ General Features — — — — — — — — — — — — — „ „ 3.3 Volt Operation SIO Block is 5 Volt Tolerant Low Pin Count Bus (LPC) Interface


    Original     		SCH3106 PC2001 SCH3106 SCH3106-NU 3032H 2322 660 91008 PDF

    dmo 365 r

    Abstract: LOG RX 2 1018 16 pin IC 3-bit comparator circuit receives two 3-bit psoc c code for ring counter 458 TIMER CIRCUIT COLLECTION simple switch block diagram Linear Technology Chronicle 2 bit magnitude comparator using 2 xor gates 3-1/2 Digit Analog-to-Digital Converters adjustable zero span amplifier ic
    Contextual Info: PSoC TRM CY8C29x66, CY8C27x43, CY8C24x94, CY8C24x23, CY8C24x23A, CY8C22x13, CY8C21x34, and CY8C21x23 PSoC™ Mixed Signal Array Technical Reference Manual TRM Document No. PSoC TRM 1.21 Cypress Semiconductor 3901 North First Street San Jose, CA 95134


    Original     		CY8C29x66, CY8C27x43, CY8C24x94, CY8C24x23, CY8C24x23A, CY8C22x13, CY8C21x34, CY8C21x23 dmo 365 r LOG RX 2 1018 16 pin IC 3-bit comparator circuit receives two 3-bit psoc c code for ring counter 458 TIMER CIRCUIT COLLECTION simple switch block diagram Linear Technology Chronicle 2 bit magnitude comparator using 2 xor gates 3-1/2 Digit Analog-to-Digital Converters adjustable zero span amplifier ic PDF

    Power MOSFET TT 2146

    Abstract: SCHEMATIC DIAGRAM monitor LG t17 jc equivalent for transistor tt 2146 TT 2146 M4 G4 a51 ZENER DIODE CAT16-PC4F12 proton rx 3000 transistor TT 2146 FG484 PQ208
    Contextual Info: Advanced v0.7 Fusion Family of Mixed-Signal Flash FPGAs ® with Optional Soft ARM Support Features and Benefits – High Performance Reprogrammable Flash Technology • • • • • • Advanced 130-nm, 7-Layer Metal, Flash-Based CMOS Process Nonvolatile, Retains Program When Powered-Off


    Original     		130-nm, 32-Bit Power MOSFET TT 2146 SCHEMATIC DIAGRAM monitor LG t17 jc equivalent for transistor tt 2146 TT 2146 M4 G4 a51 ZENER DIODE CAT16-PC4F12 proton rx 3000 transistor TT 2146 FG484 PQ208 PDF

    eni 16c

    Abstract: MICRO SWITCH Sensing and Control Catalog No. 15 analog ups circuit diagram opamp schematic VC-125-4 automatic room power controller using scr Crystal oscillators 48.000 4 12 digit lcd display for watch 50 Amp current 512 volt scr SCHEMATIC circuit scr oscillator
    Contextual Info: CY8C22113, CY8C22213 PSoC Mixed Signal Array Preliminary Data Sheet For Silicon Revision A October 15, 2003 Cypress MicroSystems 2700 162nd Street SW Building D Lynnwood, WA 98037 Phone: 800.669.0557 FAX: 425.787.4641 http://www.cypress.com Document No. 38-12009 Rev. *B


    Original     		CY8C22113, CY8C22213 162nd CY8C22xxx CY8C22213 eni 16c MICRO SWITCH Sensing and Control Catalog No. 15 analog ups circuit diagram opamp schematic VC-125-4 automatic room power controller using scr Crystal oscillators 48.000 4 12 digit lcd display for watch 50 Amp current 512 volt scr SCHEMATIC circuit scr oscillator PDF

    lpc47n350-nu

    Abstract: AB1A marking mbx 171 rev 1.0 8051 Keyboard Controller lm7412 fairchild 245
    Contextual Info: LPC47N350 Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface PRODUCT FEATURES „ „ „ Datasheet 3.3V Operation with 5V Tolerant Buffers ACPI 2.0 PC2001 Compliant LPC Interface with Clock Run Support „ — Decode I/O, Memory, and FWH cycles


    Original     		LPC47N350 PC2001 MC146818 DS1287 128-Byte 4x32-Byte 24-Hour 8584-Style LPC47N350 lpc47n350-nu AB1A marking mbx 171 rev 1.0 8051 Keyboard Controller lm7412 fairchild 245 PDF

    tmpa8829

    Abstract: TMPA88 TMPA8827PSNG TMPA8827 TMPA8829CSNG TMPA8829CRNG tmpa8829cpng TMPA8829CMNG tmpa8829 datasheet 360 2002b
    Contextual Info: TMPA8829CMNG /CPNG /CRNG /CSNG TOSHIBA Integrated Circuit TMPA8829CMNG /CPNG /CRNG /CSNG MCU and Signal Processor for a PAL/NTSC TV The TMPA8829CMNG /CPNG /CRNG /CSNG is an integrated circuit for a PAL/ NTSC TV. A MCU and a TV signal processor are integrated in a 64-pin shrink DIP package. The MCU contains


    Original     		TMPA8829CMNG 64-pin TMPA8829CMNG TMPA8829CPNG TMPA8829CRNG TMPA8829CSNG TMPA8827PSNG tmpa8829 TMPA88 TMPA8827 TMPA8829CSNG TMPA8829CRNG tmpa8829cpng tmpa8829 datasheet 360 2002b PDF

    tektronix tek 455 osc. manual

    Abstract: TRANSISTOR SUBSTITUTION DATA BOOK 1993 4010PG191-5 apollo guidance cadence xa 125 2 pinout of bel 187 transistor power one ppr 7.24 ABEL-HDL Reference Manual XC7200 3020p
    Contextual Info: ON LIN E R DEVELOPMENT SYSTEM REFER E NCE G UI DE VOL UM E 2 T ABL E OF CONT ENT S INDEX GO T O OT HER BOOKS 0 4 0 1406 Copyright 1990-1995 Xilinx Inc. All Rights Reserved. Contents Chapter 1 The XNFMerge Program Terms.


    Original     		PDF

    vhdl code for dice game

    Abstract: four way traffic light controller vhdl coding vhdl code for TRAFFIC LIGHT CONTROLLER SINGLE WAY blackjack vhdl code vhdl coding for TRAFFIC LIGHT CONTROLLER SINGLE W vhdl code for TRAFFIC LIGHT CONTROLLER 4 WAY traffic light controller vhdl coding digital dice design VHDL digital dice design of digital VHDL altera vhdl code for traffic light control
    Contextual Info: Metamor PLD Programming Using VHDL User’s Guide Version 2.4 Copyright 1992 - 1996, Metamor, Inc. All rights reserved Table of Contents - Metamor User’s Guide 1 - About This Guide Notation Conventions . 1 - 1


    Original     		pack1076 vhdl code for dice game four way traffic light controller vhdl coding vhdl code for TRAFFIC LIGHT CONTROLLER SINGLE WAY blackjack vhdl code vhdl coding for TRAFFIC LIGHT CONTROLLER SINGLE W vhdl code for TRAFFIC LIGHT CONTROLLER 4 WAY traffic light controller vhdl coding digital dice design VHDL digital dice design of digital VHDL altera vhdl code for traffic light control PDF