25LS2548 Search Results

pin diagram of SCR

Abstract: am25ls2548
Contextual Info: 25LS2548 A m 25LS2548 Chip Select Address Decoder with Acknowledge DISTINCTIVE CHARACTERISTICS • • O pen-collector Acknowledge output fo r wired-OR appli­ cation Inverting and non-inverting enable inputs fo r upper address decoding O ne-of-Eigtit D ecoder provides eight chip select outputs

Contextual Info: csi CO _l A m 25LS2548 cm Chip Select Address Decoder with Acknowledge in < DISTINCTIVE CHARACTERISTICS • • O pen-collector Acknowledge output fo r wired-OR appli­ cation Inverting and non-inverting enable inputs fo r upper address decoding O ne-of-Eigtit D ecoder provides eight chip select outputs

25LS2521

Abstract: 25LS244 8051 interface 8155 8251 with 8086 9511A 6259A 8155 programmable peripheral interface 9517A AMZ8536 8253 interface with 8086 Peripheral
Contextual Info: MOS Microprocessor MOS Microprocessor Family Selector Guide 8086/88 8085A 8085A-2 8080A Z8001/2t Z8001/2-A Clock Parted 200ns 320ns 200ns Clock Generator 8284A On-Chip On-Chip 8224 8127 8127 Arithmetic Processing Unit 8087 9511A-1 9512-1 9 5Í1A -4 9512-1

Contextual Info: Am25LS2538 Am25LS2538 One-of-Eight Decoder with Three-State Outputs and Polarity Control DISTINCTIVE CHARACTERISTICS • • • Three-state decoder outputs Buffered com m on output polarity control Inverting and non-inverting enable inputs A. C. param eters specified over operating tem perature

L 9134

Abstract: am25ls2538
Contextual Info: Am25LS2538 A m 25LS2538 One-of-Eight Decoder with Three-State Outputs and Polarity Control DISTINCTIVE CHARACTERISTICS • • • Three-state decoder outputs Buffered comm on output polarity control Inverting and non-inverting enable inputs A. C. param eters specified over operating tem perature

1 into 16 demultiplexer circuit diagram using 1 i

Abstract: 1 into 16 demultiplexer diagram using 1 i 25LS2548 D-16 03602B F16 100 HIP 25LS2537 25LS2539
Contextual Info: Am2924 Am2924 Three-Line to Eight-Line Decoder/Demultiplexer DISTINCTIVE CHARACTERISTICS • • Advanced Schottky technology Inverting and non-inverting enable inputs GENERAL DESCRIPTION The Am 2924 is a 3-line to 8-line decoder/dem ultiplexer fabricated using advanced Schottky technology. The de­

L 9134

Contextual Info: Am25LS2538 A m 25LS2538 One-of-Eight Decoder with Three-State Outputs and Polarity Control DISTINCTIVE CHARACTERISTICS • • • Three-state decoder outputs Buffered comm on output polarity control Inverting and non-inverting enable inputs A. C. param eters specified over operating tem perature

AM25LS2538

Contextual Info: Am25LS2537 Am 25LS2537 One-of-Ten Decoder with Three-State Outputs and Polarity Control DISTINCTIVE CHARACTERISTICS • • • Does not respond to codes above nine A C. param eters specified over operating tem perature and power supply ranges Three-state outputs

Contextual Info: Am25LS2539 Am25LS2539 Dual One-of-Four Decoder with Three-State Outputs and Polarity Control DISTINCTIVE CHARACTERISTICS • • • • Two independent decoders/dem ultiplexers Three-state outputs Buffered com m on polarity control A. C. param eters specified over operating tem perature

74LS189 equivalent

Abstract: 74LS200 AmZ8036 Z8104 74LS300 AM9511 Am2505 27s13 54S244 27LS00
Contextual Info: Advanced Micro Devices Condensed Catalog 1981 Advanced Micro Devices, Inc. Advanced Micro Devices reserves the right to make changes in its products without notice in order to improve design or performance characteristics. The company assumes no responsibility for the use of any circuits described herein.

YJ 18

Contextual Info: Am25LS2537 Am 25LS2537 One-of-Ten Decoder with Three-State Outputs and Polarity Control DISTINCTIVE CHARACTERISTICS • • • Does not respond to codes above nine A C. param eters specified over operating tem perature and power supply ranges Three-state outputs

1 into 16 demultiplexer circuit diagram using 1 i

Abstract: 25ls2539 25LS2548 lmb 50j D-16 25ls2536 F16 - 100 HIP
Contextual Info: Am2924 Am2924 Three-Line to Eight-Line Decoder/Demultiplexer DISTINCTIVE CHARACTERISTICS • • Advanced Schottky technology Inverting and non-inverting enable inputs GENERAL DESCRIPTION The Am 2924 is a 3-line to 8-line decoder/dem ultiplexer fabricated using advanced Schottky technology. The de­

25LS2538

Abstract: 25LS2537 851-02R14-5PY50+L/C
Contextual Info: Am25LS2537 Am25LS2537 One-of-Ten Decoder with Three-State Outputs and Polarity Control DISTINCTIVE CH A RACTERISTICS • • • D o e s not respond to co d e s above nine A C. parameters specified over operating temperature and power supply range s Three-state outputs

25LS2548

Abstract: AM25LS2548PC
Contextual Info: 25LS2548 25LS2548 Chip Select Address Decoder with Acknowledge DISTINCTIVE CHARACTERISTICS • • Open-collector Acknowledge output for wired-OR appli­ cation Inverting and non-inverting enable inputs for upper address decoding One-of-Eight Decoder provides eight chip select outputs