2509C Search Results

Contextual Info: Ordering n u m b e r:E N 2509C 2SC3996 NO.2509C NPN Triple Diffused Planar Silicon Transistor Ultrahigh-Deflnition CRT Display Horizontal Deflection Output Applications F e a tu re s • High speed tf= 100ns typ . • High reliability (Adoption of HVP process).

P16C2509

Contextual Info: fià PER ICOM I i i i I I l i i l i I 2509C I I I I I I I I I i I I i I I I I I I I I I I I I I I I I I I I I I I I I I I I I f I l < I l l I I I I I I I I i I t I I l I I II I I I i i I I I I I I i I l l i I I I I I I I i l i i I I I I I I I i Low-Noise Phase-Locked Loop

2510d

Abstract: 1360D M 2530
Contextual Info: N o n -In su la te d T erm in als F eed -T h ru Turret M iniature & Subm iniature Please refer to Figure 1290 P a rt No. Board Thick M ounting +.003 Hole Dia 001 D Nom L Nom Swage Tool Ì290A .031 .116 .114 .075 1290 1290B .062 .116 .114 .105 1290 1290C .094

PC133 registered reference design

Contextual Info: Integrated Circuit Systems, Inc. 2509C 3.3V Phase-Lock Loop Clock Driver General Description Features The 2509C is a high performance, low skew, low jitter clock driver. It uses a phase lock loop PLL technology to align, in both phase and frequency, the CLKIN signal with

PC133 registered reference design

Contextual Info: Integrated Circuit Systems, Inc. DATA SHEET 2509C 2509C 3.3V Phase-Lock Loop Clock Driver 3.3V Phase-Lock Loop Clock Driver General Description Features The 2509C is a high performance, low skew, low jitter clock driver. It uses a phase lock loop PLL technology to