24 PIN K-LINE 8 MHZ Search Results

Contextual Info: TM024HAC4 1,048,576 BY 4-BIT DYNAMIC RAM MODULE M A Y 1 9 8 7 — R E V IS E D M A Y 1 9 8 8 A C SINGLE-IN-LINE P A C K A G E x 4 Organization Dynamic RAM Modules 1,048.576 TO P V IE W Single 5-V Supply 110% Tolerance) 24-Pin Single-In-line Package (SIP)

Contextual Info: IMAGE SENSOR CCD image sensor S9037/S9038 series High-speed operation, back-thinned FFT-CCD S9037/S9038 series FFT-CCD image sensors were developed for high-speed line scan cameras. Since an on-chip amplifier having a wide bandwidth is used to an image sensor, a pixel rate of 10 MHz can be obtained. S9037/S9038 series image sensors also deliver a high line scan

Contextual Info: IMAGE SENSOR CCD image sensor S9037/S9038 series High-speed operation, back-thinned FFT-CCD S9037/S9038 series FFT-CCD image sensors were developed for high-speed line scan cameras. Since an on-chip amplifier having a wide bandwidth is used to an image sensor, a pixel rate of 10 MHz can be obtained. S9037/S9038 series image sensors also deliver a high line scan

Contextual Info: IMAGE SENSOR CCD image sensor S9037/S9038 series High-speed operation, back-thinned FFT-CCD S9037/S9038 series FFT-CCD image sensors were developed for high-speed line scan cameras. Since an on-chip amplifier having a wide bandwidth is used to an image sensor, a pixel rate of 10 MHz can be obtained. S9037/S9038 series image sensors also deliver a high line scan

S9038-0902S

Abstract: S9037-0902N
Contextual Info: CCD image sensors S9037/S9038 series High-speed operation, back-thinned FFT-CCD The S9037/S9038 series FFT-CCD image sensors were developed for high-speed line scan cameras. Since an on-chip amplifier having a wide bandwidth is used to an image sensor, a pixel rate of 10 MHz can be obtained. The S9037/S9038 series image sensors also deliver a high line scan rate equivalent to interline CCD sensors when used in line binning operation mode, because they

PC keyboard CIRCUIT diagram

Abstract: 8042 keyboard controller datasheet 74ALS04 KBD42W11 8042 Keyboard Controller circuit diagram of ibm keyboard keyboard controller 7407 GA20 "Keyboard Controller"
Contextual Info: KBD42W11 Keyboard Controller FEATURES • • • Supports IBM PC and Compatible System Designs Runs Much Faster Than Traditional Keyboard Controllers Host interface Compatible with Traditional Keyboard Controller • • • • 6 MHz – 12 MHz Operating Frequency

MC13145

Abstract: MC13146 MC33411 MC33411A MC33411AFTA MC33411B MC33411BFTA compressor ALC WT-120 CT900
Contextual Info: Order this document by MC33411A/D MC33411A/B 900 MHz Analog Cordless Phone Baseband with Compander The MC33411 900 MHz Analog Cordless Phone Baseband system is designed to fit the requirements of a 900 MHz analog cordless telephone system. Included are three PLLs Phase–Locked Loops . Two are intended

Contextual Info: Freescale Semiconductor, Inc. Order this document by MC33411A/D MC33411A/B 900 MHz Analog Cordless Phone Baseband with 900 MHz ANALOG CORDLESS PHONE BASEBAND WITH COMPANDER The MC33411 900 MHz Analog Cordless Phone Baseband system is designed to fit the requirements of a 900 MHz analog cordless telephone

GRM39X7R103K50V

Contextual Info: ACA2407E 750/870 MHz CATV Power Doubler Line Amplifier Data Sheet - Rev 2.5 FEATURES • 21.3 dB Gain • Very Low Distortion • Excellent 75 Ω Input and Output Match • Stable with High VSWR Load Conditions • Monolithic Design for Consistent Performance

STM32F100xx Flash programming manual

Abstract: STM32F100xB stm32f100 STM32F10xxx reference manual Alternate function stm32f100c4 STM32F100C STm32F100C8 STM32F100x8 STM32F100rb TFBGA64 Battery Ic
Contextual Info: STM32F100x4 STM32F100x6 STM32F100x8 STM32F100xB Low & medium-density value line, advanced ARM-based 32-bit MCU with 16 to 128 KB Flash, 12 timers, ADC, DAC & 8 comm interfaces Datasheet  production data Features • Core: ARM 32-bit Cortex -M3 CPU – 24 MHz maximum frequency,

Contextual Info: THS6182 www.ti.com SLLS544B – SEPTEMBER 2002 – REVISED DECEMBER 2002 LOW POWER DISSIPATION ADSL LINE DRIVER FEATURES D Low Power Dissipation Increases ADSL Line D D D D D D D D Card Density Low THD of –88 dBc 100-Ω, 1 MHz Low MTPR Driving +20 dBm on the Line

Contextual Info: THS6182 www.ti.com SLLS544F – SEPTEMBER 2002 – REVISED MARCH 2004 LOW-POWER DISSIPATION ADSL LINE DRIVER FEATURES • • • • • • • • • Low-Power Dissipation Increases ADSL Line Card Density Low THD of -88 dBc 100 Ω, 1 MHz Low MTPR Driving +20 dBm on the Line

STM32F102x8

Abstract: STM32F1 stm32f102 manual stm32f102 stm32f102 reference manual stm32f102c AN2606 stm32 STM32F102xB AN2606 LQFP48
Contextual Info: STM32F102x8 STM32F102xB Medium-density USB access line, ARM-based 32-bit MCU with 64/128KB Flash, USB FS interface, 6 timers, ADC & 8 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 48 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

EL1503C

Abstract: EL1508C SOIC-16 THS6182 THS6182D THS6182RHFR THS6182RHFT
Contextual Info: THS6182 www.ti.com SLLS544F – SEPTEMBER 2002 – REVISED MARCH 2004 LOW-POWER DISSIPATION ADSL LINE DRIVER FEATURES • • • • • • • • • Low-Power Dissipation Increases ADSL Line Card Density Low THD of -88 dBc 100 Ω, 1 MHz Low MTPR Driving +20 dBm on the Line

STM8S208

Abstract: RM0016 STM8S 5401 DM pm0044 sda 5241 STM8 CPU programming manual LQFP32 LQFP44 LQFP48
Contextual Info: STM8S207xx STM8S208xx Performance line, 24 MHz STM8S 8-bit MCU, up to 128 Kbytes Flash, integrated EEPROM,10-bit ADC, timers, 2 UARTs, SPI, I²C, CAN Features • ■ ■ ■ ■ Core – Max fCPU: Up to 24 MHz, 0 wait states @ fCPU ≤ 16 MHz – Advanced STM8 core with Harvard

STM8S

Abstract: stm8s207XX STM8S208 4801h STM8S207 STM8S 207 IN5142 UM04 STM8S208xx STM8S207K8
Contextual Info: STM8S207xx STM8S208xx Performance line, 24 MHz STM8S 8-bit MCU, up to 128 Kbytes Flash, integrated EEPROM, 10-bit ADC, timers, 2 UARTs, SPI, I²C, CAN Features • Core – Max fCPU: up to 24 MHz, 0 wait states @ fCPU  16 MHz – Advanced STM8 core with Harvard

STM8S208x

Abstract: stm8s208 STM8S20 afr45 8000-0x00 STM8S STM8S 207
Contextual Info: STM8S207xx STM8S208xx Performance line, 24 MHz STM8S 8-bit MCU, up to 128 KB Flash, integrated EEPROM, 10-bit ADC, timers, 2 UARTs, SPI, I²C, CAN Features • Core – Max fCPU: up to 24 MHz, 0 wait states @ fCPU ≤ 16 MHz – Advanced STM8 core with Harvard

transistor z5

Abstract: erie redcap IC 2025 NPN TRANSISTOR Z4 RF push pull power amplifier TRANSISTOR Z4 MRF392 redcap 7w120 transistor D 716
Contextual Info: Order this document by MRF392/D SEMICONDUCTOR TECHNICAL DATA The RF Line NPN Silicon Push-Pull RF Power Transistor MRF392 Designed primarily for wideband large–signal output and driver amplifier stages in the 30 to 500 MHz frequency range. • Specified 28 Volt, 400 MHz Characteristics —

24256E

Abstract: C56E
Contextual Info: CAT24C256 256 kb I2C CMOS Serial EEPROM Description The CAT24C256 is a 256 kb Serial CMOS EEPROM, internally organized as 32,768 words of 8 bits each. It features a 64−byte page write buffer and supports the Standard 100 kHz , Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol.

Contextual Info: PRELIMINARY PRM P024F048T12AL V•I Chip – PRM-AL Pre-Regulator Module TM • 24 V input V•I Chip PRM • Adaptive Loop feedback • Vin range 18 – 36 Vdc • ZVS buck-boost regulator • High density – 414 • 1.33 MHz switching frequency W/in3

I-CUBE

Abstract: P005 p055 TRANSISTOR IDS200 p055 power transistor IQ32B IQ48 IQ64B IQ96 84l transistor
Contextual Info: I-Cube IQ Family Data Sheet m F eatures D e s c r ip t io n • SRAM-based, in-system programmable The IQ family of SRAM-based bit-oriented switching devices is • Switch Matrix manufactured using 0.6|jm CMOS processes. These devices — Non-Blocking offer clock speeds of up to 150 MHz and pin-to-pin delay as low

SDA5241

Abstract: SDA-2083 IC A5162 teletext K28H sda 5241 sda 20160 114H 125H 125L
Contextual Info: Data Slicer for Teletext SDA 5231-5 preliminary uaia Bipolar lu Features Crystal-stable data clock regeneration for a bit rate ~ of 6.9375 MHz • Separation and regeneration of teletext information • Separation of the horizontal and vertical synchroni­

STM32F103xE

Abstract: LQPF100 FOOTPRINTS BGA64 LQFP100 LQFP48 LQFP64 STM32F103C8 STM32F103RB AN2606 STM32F103CBT6
Contextual Info: STM32F103x8 STM32F103xB Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces Features • Core: ARM 32-bit Cortex -M3 CPU – 72 MHz maximum frequency, 1.25 DMIPS/MHz Dhrystone 2.1

Contextual Info: DEVICE SPECIFICATION B iC M O S C LO C K SYNTHESIZER FEATURES • Multiplies input reference frequency by integers 2-32 • Digitally programmable output clock frequencies from 10 MHz to 300 MHz • Two 2 groups of independent clock outputs One group consists of differential