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    223MHZ Search Results

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    Bourns Inc SRP4021HMCT-R15M

    Power Inductors - SMD Ind,4.2x4.3x1.9mm,0.15uH+/-20%,16.5A,shd
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    TTI SRP4021HMCT-R15M Reel 3,000
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    Abracon Corporation ABSTS5A2-22NM024M

    Signal Conditioning Signal Conditioning SAW Filter GPS 1223M
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    TTI ABSTS5A2-22NM024M Reel 5,000
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    MMD MMC-123F-8.3223MHZ

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    Bristol Electronics MMC-123F-8.3223MHZ 863
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    223MHZ Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: LTC2153-14 14-Bit 310Msps ADC FEATURES n n n n n n n n n n n n DESCRIPTION The LTC 2153-14 is a 310Msps 14-bit A/D converter designed for digitizing high frequency, wide dynamic range signals. It is perfect for demanding communications applications with AC performance that includes 68.8dB


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    ltc2153-1414-bit310msps25ghz+3401mw32vp-p300mhz PDF

    Contextual Info: LTC2158-14 Dual 14-Bit 310Msps ADC FEATURES n n n n n n n n n n n n DESCRIPTION The LTC 2158-14 is a 2-channel simultaneous sampling 310Msps 14-bit A/D converter designed for digitizing high frequency, wide dynamic range signals. It is perfect for demanding communications applications with AC performance that includes 68.8dB SNR and 88dB spurious


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    ltc2158-1414-bit310msps25ghz+3724mw32vp-pqfn-20 PDF

    db1n

    Abstract: LTC6409 DB89 SDI video mixer circuit diagram LTC2158UP-12 DA11N-4 LVDS 315MHZ DA1011 LTC2158-12 DB25 DWG
    Contextual Info: LTC2158-12 Dual 12-Bit 310Msps ADC Features Description 67.6dBFS SNR n 88dB SFDR n Low Power: 688mW Total n Single 1.8V Supply n DDR LVDS Outputs n 1.32V P-P Input Range n 1.25GHz Full Power Bandwidth S/H n Optional Clock Duty Cycle Stabilizer n Low Power Sleep and Nap Modes


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    ltc2158-1212-bit310mspsn88db+13688mw25ghz14-bitn64-leaddb1nltc6409db89sdi video mixer circuit diagramltc2158up-12da11n-4lvds 315mhzda1011db25 dwg PDF

    D1011

    Abstract: SDI video mixer circuit diagram 47T1 N40L d8932 3-10MHz
    Contextual Info: LTC2153-12 12-Bit 310Msps ADC Features Description 67.6dBFS SNR n 88dB SFDR n Low Power: 378mW Total n Single 1.8V Supply n DDR LVDS Outputs n 1.32V P-P Input Range n 1.25GHz Full Power Bandwidth S/H n Optional Clock Duty Cycle Stabilizer n Low Power Sleep and Nap Modes


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    ltc2153-1212-bit310mspsn88db+9378mw25ghzn40-leadd1011sdi video mixer circuit diagram47t1n40ld89323-10mhz PDF

    1008CS

    Abstract: DW9282
    Contextual Info: DW9282 110.592MHz SAW IF Filter The DW9282 is a 110.592MHz SAW filter which has been designed for the first IF section in Digital European Cordless Telephones DECT . The filter design has resulted in an insertion loss of 12dB (max.), low group delay ripple of 100ns (typ.), with quartz temperature


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    dw9282592mhzds4323-2100ns+11008cs PDF

    MCD2005

    Abstract: 8002 AUDIO amplifier bpf 4R7 BB149 SSOP-20L PLL 100Mhz MCU programmable counter ic Phase Locked loop IC to drive VCO 4116 & FM MCD2005RX
    Contextual Info: MC Devices General Description Features MCD2005TX/RX is a set of ICs for FSK/FM transceiver intended for use in wireless data/audio communication, including one IC TX for transmitter and the other IC (RX) for receiver. The operating frequency covers 100MHz-500MHz.


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    mcd2005tx/rx100mhz-500mhz50ohmmcd2005+98002 audio amplifierbpf 4r7bb149ssop-20lpll 100mhz mcuprogrammable counter icphase locked loop ic to drive vco4116 & fmmcd2005rx PDF

    d13n3

    Abstract: LTC2153-14 LTC2153UJ-14 sck 124 442 LTC2153C LTC2153CUJ-14 LTC2153I LTC2153IUJ-14 voltage stabilizer schematic diagram mark d13n
    Contextual Info: Electrical Specifications Subject to Change LTC2153-14 14-Bit 310Msps ADC Features Description 68.8dBFS SNR n 88dB SFDR n Low Power: 401mW Total n Single 1.8V Supply n DDR LVDS Outputs n Easy-to-Drive 1.32V P-P Input Range n 1.25GHz Full Power Bandwidth S/H


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    ltc2153-1414-bit310mspsn88db+13401mw25ghz12-bitn40-leadd13n3ltc2153uj-14sck 124 442ltc2153cltc2153cuj-14ltc2153iltc2153iuj-14voltage stabilizer schematic diagrammark d13n PDF

    16 bit multiplier VERILOG

    Abstract: multiplier accumulator MAC code VHDL multiplier accumulator MAC code verilog vhdl code for accumulator addition accumulator MAC code verilog 16 bit multiplier VERILOG circuit multiplier accumulator unit with VHDL verilog code for 16 bit multiplier MULT18X18S XAPP636
    Contextual Info: Application Note: Virtex-II Family R XAPP636 v1.4 June 24, 2004 Summary Optimal Pipelining of I/O Ports of the Virtex-II Multiplier Author: Markus Adhiwiyogo This application note and reference design describes a high-speed, optimized implementation of a Virtex -II pipelined multiplier primitive (MULT18X18 and MULT18X18S) implemented in


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    xapp636mult18x18mult18x18s16 bit multiplier verilog+7multiplier accumulator mac code vhdlmultiplier accumulator mac code verilogvhdl code for accumulatoraddition accumulator mac code verilog16 bit multiplier verilog circuitmultiplier accumulator unit with vhdlverilog code for 16 bit multiplier PDF

    Contextual Info: LTC2158-12 Dual 12-Bit 310Msps ADC FEATURES n n n n n n n n n n n n DESCRIPTION The LTC 2158-12 is a 2-channel simultaneous sampling 310Msps 12-bit A/D converter designed for digitizing high frequency, wide dynamic range signals. It is perfect for demanding communications applications with AC performance that includes 67.6dB SNR and 88dB spurious


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    ltc2158-1212-bit310msps25ghz+3688mw32vp-p300mhz PDF

    Contextual Info: LTC2153-12 12-Bit 310Msps ADC FEATURES n n n n n n n n n n n n DESCRIPTION The LTC 2153-12 is a 310Msps 12-bit A/D converter designed for digitizing high frequency, wide dynamic range signals. It is perfect for demanding communications applications with AC performance that includes 67.6dB


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    ltc2153-1212-bit310msps25ghz+3378mw32vp-pconfiguration20 PDF

    Contextual Info: NOVEMBER 1995 PRELIMINARY INFORMATION DS4323-1•1 DW9282 • Low Insertion Loss ■ Quartz Temperature Stability ■ Balanced or Unbalanced Drive ■ Low Profile Surface Mount Package 3 GND 4 GND 5 INPUT+ 1 ABSOLUTE MAXIMUM RATINGS DC voltage Maximum input power


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    ds4323-1dw9282592mhz100ns+29mm37mm10dbm PDF

    SDI video mixer circuit diagram

    Abstract: Amplifier gain 5000, 10000, 20000 CMRR 80dB at 50 79dBFS
    Contextual Info: LTC2153-14 14-Bit 310Msps ADC Features Description 68.8dBFS SNR n 88dB SFDR n Low Power: 401mW Total n Single 1.8V Supply n DDR LVDS Outputs n Easy-to-Drive 1.32V P-P Input Range n 1.25GHz Full Power Bandwidth S/H n Optional Clock Duty Cycle Stabilizer n Low Power Sleep and Nap Modes


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    ltc2153-1414-bit310mspsn88db+7401mw25ghz12-bitn40-leadsdi video mixer circuit diagramamplifier gain 5000, 10000, 20000 cmrr 80db at 5079dbfs PDF

    quartz 4MHz

    Abstract: 110.592mhz 1008CS DW9282 FC62
    Contextual Info: DW9282 110.592MHz SAW IF Filter The DW9282 is a 110.592MHz SAW filter which has been designed for the first IF section in Digital European Cordless Telephones DECT . The filter design has resulted in an insertion loss of 12dB (max.), low group delay ripple of 100ns (typ.), with quartz temperature


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    dw9282592mhzds4323-2100ns+4quartz 4mhz110.592mhz1008csfc62 PDF

    304-MHz

    Abstract: 1008CS DW9282 ds432
    Contextual Info: DW9282 110.592MHz SAW IF Filter • Low Group Delay Ripple ■ Low Insertion Loss ■ Quartz Temperature Stability ■ Balanced or Unbalanced Drive ■ Low Profile Surface Mount Package 3 GND 4 GND 5 ABSOLUTE MAXIMUM RATINGS DC voltage Maximum input power


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    dw9282592mhzds4323-2100ns+510dbm180nh304-mhz1008csds432 PDF

    mn 53100

    Contextual Info: w V M 53100 Y I£ d a t a s e p a r a t o r c h a n n e l c h ip 950801 FEATURES 1,7 RLL Code Data Rates From 33 to 100 Mbits/sec Compatible with Zoned-Density Recording Data Separator has Zero-Phase Restart & Marginalization Programmable Write Precompensation


    OCR Scan
    vm5410064-leadvm53100223mhz+3hp5370b96mhzmn 53100 PDF