20LPV Search Results

speed performance of Lattice - PLSI Architecture

Contextual Info: Latti C6 ispLSI and pLSI 2032V/LV \Semiconductor 3.3V High Density Programmable Logic I Corporation Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — — — — — 1000 PLD Gates 32 I/O Pins, Two Dedicated Inputs 32 Registers High Speed Global Interconnect