2048KHZ Search Results

Contextual Info: S44235P Linear ICs CODEC Circuit status Military/High-RelN Nom. Supp V 5.0ñ Minimum Operating Temp (øC)0 Maximum Operating Temp (øC)70 Package StyleDIP Mounting StyleT Pinout Equivalence Code16-169 # Pins16 Ckt. (Pinout) NumberLN01600169 DescriptionA-Law Sync w/Fil/PLL;clkint 64-2048kHz

Contextual Info: S44238P Linear ICs CODEC Circuit status Military/High-RelN Nom. Supp V 5.0ñ Minimum Operating Temp (øC)0 Maximum Operating Temp (øC)70 Package StyleDIP Mounting StyleT Pinout Equivalence Code16-175 # Pins16 Ckt. (Pinout) NumberLN01600175 Descriptionu-Law Sync w/Fil/PLL;Clkint 64-2048kHz

Contextual Info: S44235D Linear ICs CODEC Circuit status Military/High-RelN Nom. Supp V 5.0ñ Minimum Operating Temp (øC)0 Maximum Operating Temp (øC)70 Package StyleDIP Mounting StyleT Pinout Equivalence Code16-169 # Pins16 Ckt. (Pinout) NumberLN01600169 DescriptionA-Law Sync w/Fil/PLL;Clkint 64-2048kHz

Contextual Info: ASAHI KASEI [AK2301] AK2301 3.3V Single channel PCM CODEC LSI FEATURE GENERAL DESCRIPTION ♦Single PCM CODEC and filtering system ♦Selectable functions • Mute • A-law / -law ♦Long Frame / Short Frame are selected automatically ♦PCM data rate 64k*N Hz (N=1~32) (64 ~ 2048kHz)

2048-kHz

Abstract: DS26303 DS26303120 AN4935 ds26303-120
Contextual Info: Maxim > App Notes > T/E carrier and packetized Keywords: clock, G.703, 2048kHz, synchronization interface, ITU-T, line interface, line interface unit, LIU, T12, BITS, SSU Dec 23, 2010 APPLICATION NOTE 4935 How to Enable the ITU-T G.703 2048kHz Synchronization Interface T12 on the

Contextual Info: ASAHI KASEI [AK2301] AK2301 3.3V Single channel PCM CODEC LSI FEATURE GENERAL DESCRIPTION ♦Single PCM CODEC and filtering system ♦Selectable functions • Mute • A-law / -law ♦Long Frame / Short Frame are selected automatically ♦PCM data rate 64k*N Hz (N=1~32) (64 ~ 2048kHz)

Contextual Info: S44237P Linear ICs CODEC Circuit status Military/High-RelN Nom. Supp V 5.0ñ Minimum Operating Temp (øC)0 Maximum Operating Temp (øC)70 Package StyleDIP Mounting StyleT Pinout Equivalence Code16-175 # Pins16 Ckt. (Pinout) NumberLN01600175 DescriptionA-Law Sync w/Fil/PLL;Clkint 64-2048kHz

Contextual Info: ASAHI KASEI [AK2301] AK2301 3.3V Single channel PCM CODEC LSI FEATURE GENERAL DESCRIPTION ♦Single PCM CODEC and filtering system ♦Selectable functions • Mute • A-law / -law ♦Long Frame / Short Frame are selected automatically ♦PCM data rate 64k*N Hz (N=1~32) (64 ~ 2048kHz)

Contextual Info: S44238D Linear ICs CODEC Circuit status Military/High-RelN Nom. Supp V 5.0ñ Minimum Operating Temp (øC)0 Maximum Operating Temp (øC)70 Package StyleDIP Mounting StyleT Pinout Equivalence Code16-175 # Pins16 Ckt. (Pinout) NumberLN01600175 Descriptionu-Law Sync w/Fil/PLL;Clkint 64-2048kHz

Contextual Info: S44236D Linear ICs CODEC Circuit status Military/High-RelN Nom. Supp V 5.0ñ Minimum Operating Temp (øC)0 Maximum Operating Temp (øC)70 Package StyleDIP Mounting StyleT Pinout Equivalence Code16-169 # Pins16 Ckt. (Pinout) NumberLN01600169 Descriptionu-Law Sync w/Fil/PLL;Clkint 64-2048kHz

Contextual Info: S44236P Linear ICs CODEC Circuit status Military/High-RelN Nom. Supp V 5.0ñ Minimum Operating Temp (øC)0 Maximum Operating Temp (øC)70 Package StyleDIP Mounting StyleT Pinout Equivalence Code16-169 # Pins16 Ckt. (Pinout) NumberLN01600169 Descriptionu-Law Sync w/Fil/PLL;Clkint 64-2048kHz

Contextual Info: S44237D Linear ICs CODEC Circuit status Military/High-RelN Nom. Supp V 5.0ñ Minimum Operating Temp (øC)0 Maximum Operating Temp (øC)70 Package StyleDIP Mounting StyleT Pinout Equivalence Code16-175 # Pins16 Ckt. (Pinout) NumberLN01600175 DescriptionA-Law Sync w/Fil/PLL;Clkint 64-2048kHz

TDD 1605

Abstract: lt 6029 PLCC-44 cr16 0.8um tg-500 L3000N L3000S PLCC44 SEL24 STLC3040
Contextual Info: STLC3040 S U BSC R IBER LINE INTERFACE CODEC FILTER, CO FISLIC PRELIM IN ARY DATA PLCC44 O RDERING NUM BER: STLC3040FN Figure 1 : Pin Connection Top view o > [ « [ <° \ Single chip CODEC and FILTER including all LOW-VOLTAGE SLIC functions. Advanced 12V BJT, 5V CMOS 0.8um technol­

STLC5411

Abstract: DIP28 PLCC44 ST5421 ST5451 STLC5411FN STLC5411P
Contextual Info: STLC5411 2B1Q U INTERFACE DEVICE GENERAL FEATURES SINGLE CHIP 2B1Q LINE CODE TRANSCEIVER SUITABLE FOR BOTH ISDN AND PAIR GAIN APPLICATIONS MEETS OR EXCEEDS ANSI U.S. AND ETSI EUROPEAN STANDARD SINGLE 5V SUPPLY DIP28 AND PLCC44 PACKAGE HCMOS3A SGS-THOMSON ADVANCED

XRT83SL216

Abstract: XRT83SL216IB rsu 150 HZ0402A601
Contextual Info: XRT83SL216 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT AUGUST 2006 REV. 1.0.0 GENERAL DESCRIPTION APPLICATIONS The XRT83SL216 is a fully integrated 16-channel E1 short-haul LIU which optimizes system cost and performance by offering key design features. The

Nx62

Abstract: DS3100 DS3104GN DS3104-SE GR-1244-CORE GR-253-CORE GR-499-CORE
Contextual Info: Rev: 072407 DS3104-SE Line Card Timing IC with Synchronous Ethernet Support General Description The DS3104-SE is a low-cost, feature-rich timing IC for line cards with synchronous Gigabit Ethernet GbE , 10-Gigabit Ethernet (10GbE), and Fast Ethernet ports.

E1 AMI HDB3 decoder

Abstract: 102KHZ-2048KHZ 850C XRT7288 XRT82D20 XRT82D20IW HDB3 coaxial link 739s
Contextual Info: áç XRT82D20 SINGLE CHANNEL E1 LINE INTERFACE UNIT OCTOBER 2000 REV. 1.0.6 GENERAL DESCRIPTION The XRT82D20 is a fully integrated, single channel, line interface Transceiver for 75 Ω or 120 Ω E1 2.048 Mbps applications. The LIU IC consists of a receiver

hfc-s

Abstract: VAC L5051-X014-80 L5051-X014-80 l5051-x014 l5051 vogt 543 vogt f6 vogt 1N4148 PCM30
Contextual Info: DATA SHEET HFC - S 2BDS0 ISDN HDLC FIFO controller with S/T interface Copyright 1994 - 1997 Cologne Chip Designs All Rights Reserved The information presented can not be considered as assured characteristics. Data can change without notice. Parts of the information presented may be protected by

Contextual Info: áç XRT85L61 PRELIMINARY BITS BUILDING INTEGRATED TIMINING SUPPLY CLOCK EXTRACTOR NOVEMBER 2002 REV. P1.0.2 • Supports 75Ω and 120Ω (E1), 100Ω (T1) applica- GENERAL DESCRIPTION The XRT85L61 is an integrated E1, T1, 64KHz Centralized Clock interface for T1 (1.544Mbps) 100Ω,

DMO 565 R

Abstract: dmo 465 Twelve NC Code
Contextual Info: xr XRT86L34 PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO NOVEMBER 2004 REV. P1.1.6 GENERAL DESCRIPTION The XRT86L34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless, Reconfigurable, Redundancy .

Contextual Info: XRT83L30 SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR JUNE 2004 REV. 1.0.0 GENERAL DESCRIPTION The XRT83L30 is a fully integrated single-channel long-haul and short-haul line interface unit for T1 1.544Mbps 100Ω, E1(2.048Mbps) 75Ω or 120Ω

Contextual Info: xr XRT86VL34 PRELIMINARY QUAD T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION OCTOBER 2005 REV. P1.0.7 GENERAL DESCRIPTION The XRT86VL34 is a four-channel 1.544 Mbit/s or 2.048 Mbit/s DS1/E1/J1 framer and LIU integrated solution featuring R3 technology Relayless,

Contextual Info:  XRT81L27 PRELIMINARY SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY OCTOBER 2000 REV. P1.0.1 GENERAL DESCRIPTION The XRT81L27 is an optimized seven-channel, analog, 3.3V, line interface unit, fabricated using low power CMOS technology. The device contains seven

Intel 8081

Contextual Info: áç XRT82L34 PRELIMINARY QUAD T1/E1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR DECEMBER 2000 REV. P1.0.5 GENERAL DESCRIPTION The XRT82L34 is a fully integrated Quad four channels short-haul line interface unit for T1(1.544Mbps) 100Ω and E1(2.048Mbps) 75Ω or 120Ω applications.