2.048 MT1 Search Results

Contextual Info: Sem iconductor Corporation PCM Line Interface Features General Description • Provides Analog PCM Line Interface for T1 and 2.048 MHz Applications • Programmable Pulse-Shaping Line Driver TM • Performs Data and Timing Recovery • Transparent to AMI Polarity

Contextual Info: LXT300 / LXT301 T1/E1 Integrated Short Haul Transceivers with Receive Jitter Attenuation Oerwraf Description The LXT300 and LXT301 are fully integrated transceivers for both North American 1.544 MHz Tl , and European 2.048 MHz (El/CEPT) applications. Transmit pulse shapes

controller LTA 702 N

Abstract: LXT305A
Contextual Info: Standard Product February, 1994 LXT305A Low Power Tl /El integrated Short Haul Transceiver with Transmit Jitter Attenuation General Description Features T he LX T305A is a fully integrated transceiver for both N orth A m erican 1.544 M H z T l , and E uropean 2.048 M H z

Contextual Info: Standard Product February, 1994 LXT304A Low -Pow er T1/E1 Integrated Short H aul Transceiver with Receive Jitter Attenuation Features The LXT304A is a fully integrated low-power transceiver for both North American 1.544 MHz Tl , and European 2.048 MHz (E l) applications. It features a constant low

Contextual Info: DS21B6 PRELIMINARY DALLAS SEMICONDUCTOR TR A N SM IT LINE INTERFACE FEATURES PIN CONNECTIONS DS2186 • Line interface for T 1 1.544 MHz and CEPT (2.048 MHz) primary rate networks TAIS 1 [ 3 20 LCLK [ ] 19 LPOS TCLKSEL 3 [ ] 18 LNEG ZCSEN 2 • On-chip transmit LBO (line build out) and

Contextual Info: Data Sheet Network Master Series MT1000A Network Master Pro MU100010A 10G Multirate Module Redefining Transport Testing Today’s communication networks are becoming more and more sophisticated as leading network operators install new technologies like OTN,

SUNNY

Contextual Info: MT1, MT2 - DCF TYPE Very narrow or very wide bandwidths available Flexibility in the choice of network topology Sharply asymmetrical single sideband performance Optimum flat group delay characteristic Data transmission / communication system I • ELECTRICAL SPECIFICATIONS

Contextual Info: FILTERS DCF TYPE MT1, MT2 - Very narrow or very wide bandwidths available - Flexibility in the choice of network topology - Sharply asymmetrical single sideband performance - Optimum flat group delay characteristic - Data transmission / communication system

Contextual Info: F IL T E R S DCF TYPE MT1, MT2 - Very narrow or very wide bandwidths available - Flexibility in the choice of network topology - Sharply asymmetrical single sideband performance - Optimum flat group delay characteristic - Data transmission / communication system

Contextual Info: a Am2056 EPIC2 Extended PCM Interface Controller 2 Version A1 Advanced Mi cr o Devices Preliminary D ata Sheet 6/90 S Publication # 15115 D Rev. Amendment A /0 Issue Date: August 1990_ N EPIC2 Data Sheet 6/90 0. GENERAL Upstream: Direction from the subscriber to the PCM highways in the exhange.

TSO-63

Abstract: PEB2056-N MAE 411 AM2056 PEB 20901 N PLCC44 PEB2056N PEB2056 TLP 433 D6106
Contextual Info: •AOV 2 1 ^ C l Am2056 EPIC2 Extended PCM Interface Controller 2 Version A l Preliminary D ata Sheet 6/90 Publication # Rev. Amendment 15115 A /O Issue Date: Auaust 1990 This Material Copyrighted By Its Respective Manufacturer Advanced Micro Devices EPIC2 Data Sheet 6/90

MT8088

Contextual Info: PRELIMINARY M ir ^ n O M * MT8D88C132VH/432VH S , MT16D88C232VH/832VH (S) 4MB, 8MB, 16MB, 32MB DRAM CARDS DRAM MINICARD 4,8,16,32 m e g a b y t e s 1 MEG, 2 MEG, 4 MEG, 8 MEG x 32; 3.3V FAST PAGE MODE, OPTIONAL SELF REFRESH • • • • • • • •

CS2180

Contextual Info: CS61305A A Cirrus Logic Company T1/E1 Line Interface Features General Description • Provides Analog Transmission Line Interface forT 1 and E1 Applications • Provides Line Driver, Jitter Attenuator and Clock Recovery Functions • Transmit Side Jitter Attenuation

SEMICONDUCTOR dallas

Abstract: sge 128 cf 304a CS61574 DS2141 DS2145 DS2146 DS2180A DS2181 TR62411
Contextual Info: DS2145/DS2146 F U L L D ATA S H E E T A V A IL A B L E - C A L L 214-450-3836 DALLAS S E M I C O N D U C T O R CORP SGE D DALLAS SEMICONDUCTOR • 5 b l 4 1 3 0 G 0 0 S b 7 7 7 ■ DAL DS2145/DS2146 T1/CEPT Medium Haul PC M Line Interface T - V T - H - t FEATURES

tny 304

Contextual Info: C S 6 1 3 0 5 A A Cirrus Logic Company T1/E1 Line Interface Features General Description • Provides Analog Transmission Line Interface for T1 and E1 Applications The CS61305A combines the complete analog transmit and receive line interface for T1 or E1 applications in a

Contextual Info: Circuit Note CN-0254 Devices Connected/Referenced 16-Bit, 8-Channel, 250 kSPS PulSAR ADC AD7689 Circuits from the Lab reference designs are engineered and tested for quick and easy system integration to help solve today’s analog, mixed-signal, and RF design challenges. For more

AK4360VF

Abstract: AKD4360 electrolytic capacitor 10uF
Contextual Info: ASAHI KASEI [AK4360] AK4360 Low Power 2ch ∆Σ DAC with HP-AMP GENERAL DESCRIPTION The AK4360 is a 20bit low voltage & power DAC with Headphone Amplifier for digital audio system. The AK4360 uses the new developed Multi-Bit ∆Σ architecture, this new architecture achieves S/N=92dB at

AKD4360

Abstract: marking AKM AK4360VF
Contextual Info: ASAHI KASEI [AK4360] AK4360 Low Power 2ch ∆Σ DAC with HP-AMP GENERAL DESCRIPTION The AK4360 is a 20bit low voltage & power DAC with Headphone Amplifier for digital audio system. The AK4360 uses the new developed Multi-Bit ∆Σ architecture, this new architecture achieves S/N=92dB at

DSP GROUP

Abstract: d63711 DD0030 "DSP GROUP" DSPG
Contextual Info: D6371A D ata Sheet D S P G R O U P , I N C . Voice Record/Playback IC Using Flash Memory For Digital TAD/Recorder PRELIMINARY GENERAL DESCRIPTION The D6371A chip is a digital speech/signal processing subsystem that implements all functions of speech compression,

MOB2 module

Abstract: voice activated recorder circuit 60407 D6371 VOICE RECORDER IC VOICE RECORDER playback system D6371A D6371A-11 d02clb DSPG
Contextual Info: D6371A D a ta S h e e t D S P G R O U P , I N C . Voice Record/Playback IC Using Flash Memory For Digital TAD/Recorder PRELIMINARY GENERAL DESCRIPTION The D6371A chip is a digital speech/signal processing subsystem that implements all functions of speech compression,

LE79Q2284

Abstract: LE79112 LE79Q2281 LE79252 Le79228 LE79Q2284FVC LE79Q2284MVC VE790 Le792284 LE79Q2284FV
Contextual Info: Le79228 Quad Intelligent Subscriber Line Audio-processing Circuit VE790 Series APPLICATIONS ORDERING INFORMATION „ Voice over IP/DSL — Integrated Access Devices IAD , Smart Residential Gateways (SRG), Home Gateway/ Router „ Cable Telephony — NIU, Set-Top Box, Home Side

VARIABLE POWER SUPPLY. 0 - 30V, LM723

Abstract: LM741 audio amplifiers IC LM741 timer circuit diagram lm35 sensor interfacing with adc0808 diagram LM338 TO-3 spice model LM741 AND LM386 Audio Amplifier lm1485 LM1084 spice LF351 op-amp audio equalizer smd code marking 162 sot23-5
Contextual Info: Welcome to National Semiconductor’s Summer 2000 Edition of the Linear/Mixed-Signal Designer’s Guide! Included in this guide are: • • • • • Alphanumeric index Product selection trees Product selection guides Package descriptions CD-ROM with complete datasheets, a pdf version of this guide, and other valuable information

x22 mi 3A

Abstract: basic television block diagram colour television block diagram SAA5522PS SAD 512 th02 80C51 LQFP100 ROLLING GSA030
Contextual Info: INTEGRATED CIRCUITS DATA SHEET SAA55xx Standard TV microcontrollers with On-Screen Display OSD Preliminary specification File under Integrated Circuits, IC02 1999 Oct 27 Philips Semiconductors Preliminary specification Standard TV microcontrollers with On-Screen Display (OSD)

rolling display using led matrix

Abstract: SAA5562PS SAA5533 12x10 character 12x10 on screen display EIA-608 colour television block diagram microcontroller based dot matrix message display philips 23 rgb led moving message display
Contextual Info: Philips Semiconductors Preliminary specification Enhanced TV microcontrollers with On-Screen Display OSD CONTENTS SAA55xx 17 MEMORY INTERFACE Memory structure Memory mapping Addressing memory Page clearing 1 FEATURES 2 GENERAL DESCRIPTION 3 QUICK REFERENCE DATA