2.048 MT1 Search Results

Contextual Info: Sem iconductor Corporation PCM Line Interface Features General Description • Provides Analog PCM Line Interface for T1 and 2.048 MHz Applications • Programmable Pulse-Shaping Line Driver TM • Performs Data and Timing Recovery • Transparent to AMI Polarity

Contextual Info: LXT300 / LXT301 T1/E1 Integrated Short Haul Transceivers with Receive Jitter Attenuation Oerwraf Description The LXT300 and LXT301 are fully integrated transceivers for both North American 1.544 MHz Tl , and European 2.048 MHz (El/CEPT) applications. Transmit pulse shapes

controller LTA 702 N

Abstract: LXT305A
Contextual Info: Standard Product February, 1994 LXT305A Low Power Tl /El integrated Short Haul Transceiver with Transmit Jitter Attenuation General Description Features T he LX T305A is a fully integrated transceiver for both N orth A m erican 1.544 M H z T l , and E uropean 2.048 M H z

Contextual Info: Standard Product February, 1994 LXT304A Low -Pow er T1/E1 Integrated Short H aul Transceiver with Receive Jitter Attenuation Features The LXT304A is a fully integrated low-power transceiver for both North American 1.544 MHz Tl , and European 2.048 MHz (E l) applications. It features a constant low

dxo 1100

Abstract: KTD 3-2 A4 Y2 chn 228 L04 MARKING 3728MHZ 1300 st CHN
Contextual Info: tE e l x o n e Datasheet M-986-1R1 and -2R1 MFC Transceivers • Direct |j-Law PCM digital input • 2.048 Mb/s clocking • Operates with standard codecs for analog interfacing • Microprocessor read/write interface • Binary or 2-of-6 data formats •

Contextual Info: DS21B6 PRELIMINARY DALLAS SEMICONDUCTOR TR A N SM IT LINE INTERFACE FEATURES PIN CONNECTIONS DS2186 • Line interface for T 1 1.544 MHz and CEPT (2.048 MHz) primary rate networks TAIS 1 [ 3 20 LCLK [ ] 19 LPOS TCLKSEL 3 [ ] 18 LNEG ZCSEN 2 • On-chip transmit LBO (line build out) and

CHN 237

Abstract: CHN 244 chn 238 CHN 650 CHN 243 dxo 1100
Contextual Info: lC E L T C D N E Data Sheet M-986-1R2 and -2R2 M FC Transceivers • Direct A-Law PCM digital input • 2.048 Mb/s clocking • Programmable forward/backward mode The M-986 can be configured by the customer to operate with the transmitter and receiver either coupled together or inde­

Contextual Info: Data Sheet Network Master Series MT1000A Network Master Pro MU100010A 10G Multirate Module Redefining Transport Testing Today’s communication networks are becoming more and more sophisticated as leading network operators install new technologies like OTN,

SUNNY

Contextual Info: MT1, MT2 - DCF TYPE Very narrow or very wide bandwidths available Flexibility in the choice of network topology Sharply asymmetrical single sideband performance Optimum flat group delay characteristic Data transmission / communication system I • ELECTRICAL SPECIFICATIONS

Contextual Info: FILTERS DCF TYPE MT1, MT2 - Very narrow or very wide bandwidths available - Flexibility in the choice of network topology - Sharply asymmetrical single sideband performance - Optimum flat group delay characteristic - Data transmission / communication system

Contextual Info: F IL T E R S DCF TYPE MT1, MT2 - Very narrow or very wide bandwidths available - Flexibility in the choice of network topology - Sharply asymmetrical single sideband performance - Optimum flat group delay characteristic - Data transmission / communication system

hc49r

Contextual Info: APRIL, 1996 DATA SHEET LXT304A Low-Power T1/E1 Short-Haul Transceiver with Receive JA The LX T 3 0 4 A is a fully integrated low-power transceiver for both North American 1.544 Mbps T 1 , and International Low power consumption (400 m W maximum) 409c less than the LXT300

Contextual Info: a Am2056 EPIC2 Extended PCM Interface Controller 2 Version A1 Advanced Mi cr o Devices Preliminary D ata Sheet 6/90 S Publication # 15115 D Rev. Amendment A /0 Issue Date: August 1990_ N EPIC2 Data Sheet 6/90 0. GENERAL Upstream: Direction from the subscriber to the PCM highways in the exhange.

TSO-63

Abstract: PEB2056-N MAE 411 AM2056 PEB 20901 N PLCC44 PEB2056N PEB2056 TLP 433 D6106
Contextual Info: •AOV 2 1 ^ C l Am2056 EPIC2 Extended PCM Interface Controller 2 Version A l Preliminary D ata Sheet 6/90 Publication # Rev. Amendment 15115 A /O Issue Date: Auaust 1990 This Material Copyrighted By Its Respective Manufacturer Advanced Micro Devices EPIC2 Data Sheet 6/90

MT8088

Contextual Info: PRELIMINARY M ir ^ n O M * MT8D88C132VH/432VH S , MT16D88C232VH/832VH (S) 4MB, 8MB, 16MB, 32MB DRAM CARDS DRAM MINICARD 4,8,16,32 m e g a b y t e s 1 MEG, 2 MEG, 4 MEG, 8 MEG x 32; 3.3V FAST PAGE MODE, OPTIONAL SELF REFRESH • • • • • • • •

CS2180

Contextual Info: CS61305A A Cirrus Logic Company T1/E1 Line Interface Features General Description • Provides Analog Transmission Line Interface forT 1 and E1 Applications • Provides Line Driver, Jitter Attenuator and Clock Recovery Functions • Transmit Side Jitter Attenuation

SEMICONDUCTOR dallas

Abstract: sge 128 cf 304a CS61574 DS2141 DS2145 DS2146 DS2180A DS2181 TR62411
Contextual Info: DS2145/DS2146 F U L L D ATA S H E E T A V A IL A B L E - C A L L 214-450-3836 DALLAS S E M I C O N D U C T O R CORP SGE D DALLAS SEMICONDUCTOR • 5 b l 4 1 3 0 G 0 0 S b 7 7 7 ■ DAL DS2145/DS2146 T1/CEPT Medium Haul PC M Line Interface T - V T - H - t FEATURES

Contextual Info: CS61304A A Cirrus Logic Company T1/E1 Line Interface Features General Description • Provides Analog Transmission Line Interface for T1 and E1 Applications The CS61304A combines the complete analog transmit and receive line interface for T1 or E1 applications in a

tny 304

Contextual Info: C S 6 1 3 0 5 A A Cirrus Logic Company T1/E1 Line Interface Features General Description • Provides Analog Transmission Line Interface for T1 and E1 Applications The CS61305A combines the complete analog transmit and receive line interface for T1 or E1 applications in a

AD8295

Abstract: EVAL-CN0225-SDPZ-SCH pcb miniconnector EVAL-CN0225-SDPZ MT-101 AD8275 dialogue eval-sdp-cb1z Analog Devices Circuits from the lab
Contextual Info: Circuit Note CN-0225 Devices Connected/Referenced AD8275 Precision Instrumentation Amplifier with Signal Processing Amplifiers G = 0.2, Level Translator, 16-Bit ADC Driver AD7687 16-Bit, 250 kSPS PulSAR Differential ADC ADR431 Ultralow Noise XFET Voltage Reference

Contextual Info: Circuit Note CN-0254 Devices Connected/Referenced 16-Bit, 8-Channel, 250 kSPS PulSAR ADC AD7689 Circuits from the Lab reference designs are engineered and tested for quick and easy system integration to help solve today’s analog, mixed-signal, and RF design challenges. For more

AK4360VF

Abstract: AKD4360 electrolytic capacitor 10uF
Contextual Info: ASAHI KASEI [AK4360] AK4360 Low Power 2ch ∆Σ DAC with HP-AMP GENERAL DESCRIPTION The AK4360 is a 20bit low voltage & power DAC with Headphone Amplifier for digital audio system. The AK4360 uses the new developed Multi-Bit ∆Σ architecture, this new architecture achieves S/N=92dB at

AKD4360

Abstract: marking AKM AK4360VF
Contextual Info: ASAHI KASEI [AK4360] AK4360 Low Power 2ch ∆Σ DAC with HP-AMP GENERAL DESCRIPTION The AK4360 is a 20bit low voltage & power DAC with Headphone Amplifier for digital audio system. The AK4360 uses the new developed Multi-Bit ∆Σ architecture, this new architecture achieves S/N=92dB at

DSP GROUP

Abstract: d63711 DD0030 "DSP GROUP" DSPG
Contextual Info: D6371A D ata Sheet D S P G R O U P , I N C . Voice Record/Playback IC Using Flash Memory For Digital TAD/Recorder PRELIMINARY GENERAL DESCRIPTION The D6371A chip is a digital speech/signal processing subsystem that implements all functions of speech compression,