2-BIT DOWN COUNTER Search Results

SN54HC

Abstract: TEXAS CT 306 IC U114
Contextual Info: SN54HC190, SN54HC191, SN74HC190, SN74HC191 SYNCHRONOUS 4-BIT UP/DOWN DECADE AND BINARY COUNTERS 2 6 8 4 . DECEMBER 1 9 3 2 - Single Down/Up Count Control Line •

TC40102BP

Contextual Info: i;æ§ND^oLLKfcGRATEDC|RCUT TC40102BP, TC40103BP TC4C102BP 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNfER 2-Decade BCD Type TC40103BP 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTER (8-Bit Bynary Type) The TC40102BP and TC40103BP are 8-stage presettable synchronous down counters.

LS192

Abstract: master slave jk flip flop LS193
Contextual Info: T54tSt&2/193 T74ütt92/193 LS192 - PRESETTABLE BCD/DECADE UP/DOWN COUNTER LS193 - PRESETTABLE 4-BIT BINARY UP/DOWN COUNTER DESCRIPTION The T54LS192/T74LS192 is a UP/DOWN BCD De­ cade 8421 Counter and the T54LS193/T74LS193 is an UP/DOWN Modulo-16 Binary Counter. Sepa­

SMD 4E

Abstract: smd .8k cd motor cd rom motor C868-1SG C515-L C508-4E 10-BIT P-MQFP-80
Contextual Info: Timers/ Counters 16-Bit Interrupts vectors/ Levels Serial I/O FCAN 2.0B active PWM Mul./Div. Unit Data Pointers (16-Bit) Hardware Power Down Wakeable Power Down Mode 512 32 8/10Bit 4 12 / 2 USART - 7-ch - 1 - ! P-MQFP-44 CCU for DC motor control, Interrupt

Truth Table 74192

Abstract: pin diagram of counter ic 74193 74193 truth table ic 74192 74192 ic Truth Table 74193 of IC 74193 TC40192BPJC40193BP IC TTL 74193 TC40192BP/TC40193BP
Contextual Info: TC40192BPJC40193BP C2M 0 S DIGITAL INTEGRATED CIRCUIT SILICO N MONOLITHIC TC40192BP PRESETTABLE BCD UP/DOWN COUNTER Dual Clock with Reset TC40193BP PRESETTABLE BINARY UP/DOWN COUNTER (Dual Clock with Reset) T C 4 0 1 9 2 B P / T C40193BP i synchronous 4-bit up/down

Contextual Info: SN54HC190, SM54HC191, SN74HC190, SN74HC191 SYNCHRONOUS 4 BIT UP/DOWN DECADE AND BINARY COUNTERS D 2 6 8 4 , DECEMBER 1 9 8 2 - Single Down/Up Count Control Line • Look-Ahead Circuitry Enhances Speed of Cascaded Counters • Fully Synchronous in Count Modes

8 bit multiplier using vhdl code

Abstract: ado1 "Single-Port RAM"
Contextual Info: Designing ispLSI 6000 Devices in the Synplicity Environment ® 2. c4r4pl: four counters up/down, 8/16 bits, parallel load are configured as a 16-bit counter, default is up. Counter sizes can be independently changed to 8 or 16 bits for each bank; default is 16-bit. Once up, down

vhdl code for parallel to serial shift register

Abstract: isplsi architecture
Contextual Info: Designing ispLSI 6000 Devices in the Synplicity Environment ® 2. c4r4pl: four counters up/down, 8/16 bits, parallel load are configured as a 16-bit counter, default is up. Counter sizes can be independently changed to 8 or 16 bits for each bank; default is 16-bit. Once up, down

TC40102BP

Abstract: TC40102 Digital Pulse Counter Two Digit TC40103BP S-10 TC4071BP
Contextual Info: TC40102BP, TC40103BP C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC T C40102BP 8-STAGE PRESETTABLE SYNCHkOUOUS DOWN COUNTER 2-Decade BCD Type T C40103BP 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTER (8-Bit Bynary Type) The TC40102BP and TC40103BP are 8-stage presettable

Truth Table 74192

Abstract: 74193 truth table TC40192BP Truth Table 74193 ic 74193 TC40193BP ic 74192 TC40192 74193 pin assignment 74192 truth table
Contextual Info: s;LMgo:LGr J ” EDCIRCUIT TC40192BP, TC40193BP TC40192BP PRESETTABLE BCD UP/DOWN COUNTER Dual Clock with Reset TC4Q193BP PRESETTABLE BINARY UP/DOWN COUNTER (Dual Clock with Reset) T C 4 0 1 9 2 B P / T C 4 0 1 9 3 B P is synchronous 4-bit up/down counter.

ZD 282

Abstract: TC40102BP
Contextual Info: TC40102BP, TC40103BP C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC40102BP 8-STAGE PRESETTABLE SYNCHS;0i»0Ui DOwN COUNTER 2-Decade BCD Type TC4Q1Q3BP 8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTER (8-Bit Bynary Type) The TC40102BP and TC40103BP are 8-stage presettable

MSI IC

Abstract: Signetics 565 HEF4526BP programmable counter ic HEF SCHMITT-TRIGGER IN HEF4526BT GQS210S HEF4526B HEF4526BD hef4526
Contextual Info: NAPC/ SIGNETICS 2TE D • ^53^24 I I I0 5 2 1 0 0 L 5 M HEF4526B MSI T-VS-23-21 PROGRAMMABLE 4-BIT BINARY DOWN COUNTER The HEF4526B is a synchronous programmable 4-bit binary down counter with an active HIGH and an active LOW clock input CPq, CPi , an asynchronous parallel load input (PL), four parallel inputs (Pg

Contextual Info: Rev 0; 7/07 I2C, 32-Bit, Binary Counter Clock with 64-Bit ID Features The DS1372 is a 32-bit binary up counter and 24-bit down counter with a unique 64-bit ID. The counters, ID, configuration, and status registers are accessed using an I 2 C serial interface. The DS1372 includes a

DS1372

Abstract: 32 Bit Counter San Ace 40 24v
Contextual Info: Rev 0; 7/07 I2C, 32-Bit, Binary Counter Clock with 64-Bit ID Features The DS1372 is a 32-bit binary up counter and 24-bit down counter with a unique 64-bit ID. The counters, ID, configuration, and status registers are accessed using an I 2 C serial interface. The DS1372 includes a

8 bit binary to 7 segment

Abstract: 4 DIGIT DECADE COUNTER 4 digit 7 segment decoder 6-DIGIT DECADE COUNTER 4 bcd digit counter TC5054 TC5032 TC5051 HIGH FREQUENCY DECADE COUNTER BCD counter
Contextual Info: X41 Type Number TC40103B TC40107B TC40117B TC40161B TC40163B TC40174B TC40175B TC40192B TC40193B TC4502B Function 8-STAGE PRESETTABLE DOWN COUNTER 8-BIT BINARY TYPE DUAL 2-INPUT NAND BUFFER/DRIVER PROGRAMMABLE DUAL 4-BIT TERMINATOR PROGRAMMABLE BINARY COUNTER WITH ASYNCHRONOUS CLEAR

Contextual Info: S G S -T H O M S O N 4 2 E D B i 7 ^ 2 = 1 2 3 7 0 0 3 3 4 7 4 IS G T H Ö T74LS192 T74LS193 SGS-THOÜSOM iy LS192 - PRESETTABLE BCD/DECADE UP/DOWN COUNTERS LS193 - PRESETTABLE 4-BIT BINARY UP/DOWN COUNTERS • LOW POWER 95 mW TYPICAL DISSIPATION ■ SYNCHRONOUS COUNTING

74ls668

Abstract: 54LS669
Contextual Info: TYPES SN54LS668, SN54LS669, SN74LS668, SN74LS669 SYNCHRONOUS 4-BIT UP/DOWN COUNTERS D 2 3 5 1 , APRIL 19 7 7 -R E V IS E D APRIL 1 9 8 5 LS668 . . . SYNCHRONOUS UP/DO W N DECADE COUNTERS 'LS669 . . . SYNCHRONOUS UP/DOW N BINARY COUNTERS Programmable Look-Ahead Up/Down

palasm

Contextual Info: ZHAL20A Evaluation #3 Features/Benefits Logic Symbol • Demonstrate« all features of ZHAL20A product • 4-bit up/down counter with reset • 3-bit »hitter ZHAL16R4A • 25-ns maximum propagation delay •v— • Zero standby power 2 j] VCC - jjj]Y0 -

Alla

Abstract: 74AC11191
Contextual Info: 54AC11191, 74AC11191 SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS T I0 1 5 1 — 0 3 4 2 6 , M A R C H 1 9 9 0 54AC11191 . . . J PACKAGE 74AC11191 . . . DW OR N PACKAGE • Single Down/Up Count Control Line • Look-Ahead Circuitry Enhances Speed of Cascaded Counters

74HC193

Abstract: 74HCT193 74HCT192
Contextual Info: Technical Data F ile N u m b e r CD54/74HC192, CD54/74HCT192 CD54/74HC193, CD54/74HCT193 1674 High-Speed CMOS Logic BCD/BINARY PRESET Presettable Synchronous 4-Bit Up/Down Counters o o. 7 PO P1 P2 P3 - 01 - 0 2 1- Q3J C LO CK UP C LOC K DOWN BCD 192

XAPP002

Abstract: XAPP002O XAPP002V XC3000 loadable counter counter schematic
Contextual Info:  XAPP 002.002 Simple Loadable Up/Down Counter Application Note By BERNIE NEW Summary The 5-input function generator of the XC3000 family CLB makes it possible to build fully synchronous, loadable up/down counters of arbitrary length. These use only one CLB per bit, and the ripple carry delay is only 1/2 TILO

Contextual Info: ^ iM i OfMF@ fö[MÄYD©N 80C51FB/83C51FB/87C51FB CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER WITH 16K BYTES USER PROGRAMMABLE EPROM AUTOMOTIVE • High Performance CHMOS EPROM ■ Three 16-Bit Timer/Counters — Timer 2 Up/Down Counter) ■ Programmable Counter Array with:

Contextual Info: H I T A C H I / LOGIC/ARRAYS/flEM ^ 2 u n n u 7 f / i u ^ r ilw r i o De | 4 4 ^ 5 0 3 n I ? w HD74HC191 9 2 0 □Q1D437 1 0 4 3 7 D t 9 Synchronous Up/Down Decade Counter Single Clock Line # Synchronous Up/Down 4-bit Binary Counter (Single Clock Line) The HD74HC190 and HD74HC191 are lynchronous, reverslde up/dow n counter!. The HD74HC190 l i a 4-bit de­

CXB1106Q

Abstract: GHz Ripple Counter
Contextual Info: CXB1106Q/Q-Y SONY. 4-bit Ripple Down Counter with Enable and Reset Description The CXB1106Q is an ECL ultra high speed monolithic Binary Ripple Down Counter with divideb y -2 /4 /8 /1 6 outputs. Clock input has differential input pins C and C. Built-in reference voltage V b b is provided to facilitate