2 TO 4 DECODER FOR TTL CIRCUIT Search Results

Contextual Info: LS TTL DN74LS Series DN74LS155 DN74LS155 Dual 2 -lin e to 4 -lin e Decoders / Demultiplexers • Description P-2 DN74LS155 contains two 2-bit binary to quarternary decoder/demultiplexer circuits. ■ Features • Low output impedance • Enable inputs • Capability for composition o f 8-bit output decoder/

Contextual Info: Philips Semiconductors Product specification Dual 2-to-4 line decoder/demultiplexer 74LV139 FEATURES APPLICATIONS • Wide operating voltage: 1.0 to 5.5 V • Memory decoding or data-routing • Optimized for low voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between

Contextual Info: 74ACT11139 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER SCASI 75A - SEPTEMBER 1991 - REVISED APRIL 1996 • Inputs Are TTL-Voltage Compatible • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems D, N, OR PW PACKAGE TOP VIEW

74ACT11139

Contextual Info: 74ACT11139 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER SCAS175A – SEPTEMBER 1991 – REVISED APRIL 1996 D D D D D D D D Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Two Enable Inputs to Simplify

Contextual Info: 74ACT11139 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER SCAS175A – SEPTEMBER 1991 – REVISED APRIL 1996 D D D D D D D D Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Two Enable Inputs to Simplify

74ACT11139

Contextual Info: 74ACT11139 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER SCAS175A – SEPTEMBER 1991 – REVISED APRIL 1996 D D D D D D D D Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Two Enable Inputs to Simplify

74ACT11139

Abstract: 74ACT11139D 74ACT11139DE4 74ACT11139DR 74ACT11139DRE4 74ACT11139N 74ACT11139PWLE 74ACT11139PWR 74ACT11139PWRE4
Contextual Info: 74ACT11139 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER SCAS175A – SEPTEMBER 1991 – REVISED APRIL 1996 D D D D D D D D Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporates Two Enable Inputs to Simplify

SN74AHCT139

Contextual Info: SN74AHCT139 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER S C L S 2 6 7 A - DECEMBER 1 9 9 5 - REVISED FEBRUARY 19 , DB, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible EPIC (Enhanced-Performance Implanted CMOS) Process Designed Specifically for High-Speed

Moisture Sensitivity Level Rating

Contextual Info: 74ACT11139 DUAL 2ĆLINE TO 4ĆLINE DECODER/DEMULTIPLEXER SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D D D D D D D, N, OR PW PACKAGE TOP VIEW Memory Decoders and Data Transmission

Contextual Info: 74ACT11139 DUAL 2ĆLINE TO 4ĆLINE DECODER/DEMULTIPLEXER SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D D D D D D D, N, OR PW PACKAGE TOP VIEW Memory Decoders and Data Transmission

Contextual Info: 74ACT11139 DUAL 2ĆLINE TO 4ĆLINE DECODER/DEMULTIPLEXER SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D D D D D D D, N, OR PW PACKAGE TOP VIEW Memory Decoders and Data Transmission

Contextual Info: 74ACT11139 DUAL 2ĆLINE TO 4ĆLINE DECODER/DEMULTIPLEXER SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D D D D D D D, N, OR PW PACKAGE TOP VIEW Memory Decoders and Data Transmission

Contextual Info: 74ACT11139 DUAL 2ĆLINE TO 4ĆLINE DECODER/DEMULTIPLEXER SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D D D D D D D, N, OR PW PACKAGE TOP VIEW Memory Decoders and Data Transmission

74ACT11139

Abstract: 74ACT11139D 74ACT11139DE4 74ACT11139DG4 74ACT11139DR 74ACT11139DRE4 74ACT11139DRG4 74ACT11139N 74ACT11139PWLE
Contextual Info: 74ACT11139 DUAL 2ĆLINE TO 4ĆLINE DECODER/DEMULTIPLEXER SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D D D D D D D, N, OR PW PACKAGE TOP VIEW Memory Decoders and Data Transmission

Contextual Info: 74ACT11139 DUAL 2ĆLINE TO 4ĆLINE DECODER/DEMULTIPLEXER SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D D D D D D D, N, OR PW PACKAGE TOP VIEW Memory Decoders and Data Transmission

Contextual Info: 74ACT11139 DUAL 2ĆLINE TO 4ĆLINE DECODER/DEMULTIPLEXER SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D D D D D D D, N, OR PW PACKAGE TOP VIEW Memory Decoders and Data Transmission

Contextual Info: 74ACT11139 DUAL 2ĆLINE TO 4ĆLINE DECODER/DEMULTIPLEXER SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D D D D D D D, N, OR PW PACKAGE TOP VIEW Memory Decoders and Data Transmission

Contextual Info: 74ACT11139 DUAL 2ĆLINE TO 4ĆLINE DECODER/DEMULTIPLEXER SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D D D D D D D, N, OR PW PACKAGE TOP VIEW Memory Decoders and Data Transmission

Contextual Info: 74ACT11139 DUAL 2ĆLINE TO 4ĆLINE DECODER/DEMULTIPLEXER SCAS175A − SEPTEMBER 1991 − REVISED APRIL 1996 D Inputs Are TTL-Voltage Compatible D Designed Specifically for High-Speed D D D D D D D, N, OR PW PACKAGE TOP VIEW Memory Decoders and Data Transmission

smd code marking NE

Abstract: 74hc family catalog he4000b family smd marking NE 74HC139N
Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT139

NAU000

Abstract: 5 to 32 line decoder block diagram 74hc138d HCT138 74HC138N selector guide 74HC 74HCT FAMILY SMD MARKING E1 74HC138DB smd code marking e3 package marking y6
Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT138

sot355

Abstract: hct154 74HC154N
Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT154

74LS08 fan-in

Abstract: 74LS398 74LS273 74LS14 Hex Inverter definition MC74F579 74LS181 74ls795 74LS299 Decade Up/Down counter 3 State ttl buffer 74LS245
Contextual Info: Selection Information FAST/LS TTL 1 Circuit Characteristics 2 Design Considerations, Testing and Applications Assistance Form 3 FAST Data Sheets 4 LS Data Sheets 5 Reliability Data 6 Package Information Including Surface Mount 7 FAST AND LS TTL DATA CLASSIFICATION

74hc138d

Abstract: marking code E3 SMD ic hct138 74HC138N 74HC138DB 74HC138DB-T 74HC138D-T 74HC138PW 74HC138PW-T 74HCT138N
Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT138