2 PORT REGISTER FILE Search Results

Contextual Info: LOGIC DEVICES INC TS D e | SSbSTOS ODOOHET 2 five port register file lr fo s general information features The LRF08 is an 8 word x 8 bit expandable register file with five independently addressable ports, designated A through E. Each port has eight data lines, three

Contextual Info: L OGIC D E V ICES I N C IbE D • SSbSTQS 0Q007SQ 2 ■ LRF07 Three Port Register File Features_ Description_ □ 8-word x 8-bit three port memory The LUF07 is an 8 word x 8 bit expandable register file with three independently addressable ports,

register file

Abstract: UM97Z8X0104 00H-03H
Contextual Info: USER’S MANUAL 2 CHAPTER 2 ADDRESS SPACE 2.1 INTRODUCTION Four address spaces are available for the Z8 MCU: • ■ The Z8 Standard Register File contains addresses for peripheral, control, all general-purpose, and all I/O port registers. This is the default register file specification.

register file

Abstract: TMC3220 TMC3200 TMC3201 TMC3220J4C TMC3220J4V
Contextual Info: TMC3220 w f t r w Three Port Register File 3 2 W o rd s x 8 Bits, 2 0 M H z The TMC3220 is a 32 w o rd x 8 -b it th re e p o rt register file w ith one w rite port and tw o read ports. Separate enable controls on the data in put and tw o indepen dent outputs allo w considerable fle x ib ility in applications

VHDL code for TAP controller

Abstract: 4064V lsc LSP 2064VE LVCMOS33 ispMACH 4064 vhdl code for 8 bit shift register ispMach4064v scan load lattice
Contextual Info: LSC BSCAN-2: Multiple Scan Port Linker and load one instruction register and three data registers. The Scan Port Configuration block links any combination of the four secondary scan ports. The input signal ‘ENABLE_MSP’ is used as an output enable control

Contextual Info: 74S172 Signetics Register File 16-Bit Multiple Port Register File 3-State Product Specification Logic Products FEATURES • Simultaneous and independent Read and Write operations • Expandable to 1024 words on n-bits • 3-State outputs T h e '1 7 2 is a h ig h -p e rfo rm a n c e , 16-bit

AN87C196CA

Abstract: 87C196CA Programmer GuIDE Instruction 8XC196KR 87c196ca 87C196CB 87C196kr Programmer GuIDE Instruction MCS-96 Users guide
Contextual Info: 87C196CA 87C196CB 20 MHz ADVANCED 16-BIT CHMOS MICROCONTROLLER WITH INTEGRATED CAN 2 0 Automotive Y High Performance CHMOS 16-Bit CPU up to 20 MHz Operation Y Full Duplex Synchronous Serial I O Port (SSIO) Y Register-Register Architecture Y Y Up to 56 Kbytes of On-Chip EPROM

AN87C196CA

Abstract: 87C196kr Programmer GuIDE Instruction 87C196CB 196KR as87c196cb 87C196CA AN87C196CB P629 Intel 87C196CA Programmer GuIDE Instruction CA6K
Contextual Info: 87C196CA 87C196CB 20 MHz ADVANCED 16-BIT CHMOS MICROCONTROLLER WITH INTEGRATED CAN 2 0 Automotive Y High Performance CHMOS 16-Bit CPU up to 20 MHz Operation Y Full Duplex Synchronous Serial I O Port (SSIO) Y Register-Register Architecture Y Y Up to 56 Kbytes of On-Chip EPROM

register file

Abstract: OA71
Contextual Info: TMC3220 77?*? Three Port Register File 32 Words x 8 Bits, 20M H z The T M C 3 2 2 0 is a 32 w ord x 8 -b it three p o rt register file w ith one w rite p o rt and tw o read ports. Separate enable controls on the data input and tw o independent outputs a llow considerable fle xib ility in applications

TA 7136 p

Abstract: weitek 7137-100-G ad 7137
Contextual Info: WTL 7137 32-BIT INTEGER PROCESSOR ADVANCE DATA Features 32-BIT, SINGLE-CHIP PROCESSOR o 3 2-bit Integer ALU o 4-port 36x32 Register File o Parallel Multiply/Divide Unit o 32-bit Shift/Field Merge Unit POWERFUL INSTRUCTION SET o Add, Subtract, Multiply, Divide

SN74112

Abstract: SN74172 1972-REVISED register file L817
Contextual Info: SN74172 16-BIT MULTIPLE-PORT REGISTER FILE WITH 3-STATE OUTPUTS MAY 1972—REVISED MARCH 1988 SN 74172 . . . N PACKAGE Independent Read/Write Addressing Permits Simultaneous Reading and Writing • T O P V IE W 1W 1 C 1 L ^ 2 4 D v c c 23 Ü 1 W 2 1W 0 C 2

Contextual Info: JUL 2 2 1993 [P fô lL Q iM M V in te l. 87C196KD 16-BIT HIGH PERFORMANCE CHMOS MICROCONTROLLER Automotive —40°C to +125°C Full Duplex Serial Port 32 Kbytes of On-Chip EPROM High Speed I/O Subsystem 232 Byte Register File 16-Bit Timar 768 Bytes of Additional RAM

weitek

Abstract: P11000 ta 7136 AD27 AD29 AD30 32-bit-Integer weitek 7137 weitek 7136 TA 7136 p
Contextual Info: WTL 7137 32-BIT INTEGER PROCESSOR ADVANCE DATA APRIL, 1986 Features 32-BIT, SINGLE-CHIP PROCESSOR o 3 2-bit Integer ALU o 4-port 36x32 Register File o Parallel Multiply/Divide Unit o 32-bit Shift/Field Merge Unit POWERFUL INSTRUCTION SET o Add, Subtract, Multiply, Divide

TI L8236

Abstract: weitek L-8237 XL-8200 l8236
Contextual Info: XL-8237 32-BIT RASTER IMAGE PROCESSOR PRELIMINARY DATA M ay 1988 Features 32-BIT, SINGLE-CHIP GRAPHICS PROCESSOR HIGH PERFORMANCE 32-bit integer ALU Four-port 3 6 x 3 2 register file Parallel multiply/divide unit for Bezier computation 32-bit shift/field merge unit for BitBlt

weitek xl-3132

Abstract: weitek 3132 xl 3132 xl3132 XL-3132
Contextual Info: WTL 3132/WTL 3332/XL-3132 32-BIT FLOATING POINT DATA PATH O ctober 1988 Features 32-BIT FLO A TIN G POINT PROCESSOR HIGH PERFORM ANCE Single-precision floating point m ultiplier/ALU 100 and 120 ns cycle times Four-port 3 2 x 3 2 register file Up to 20 M FLOPS throughput 1 MAC/cycle

Contextual Info: 54ACT399 Quad 2-Port Register General Description Features The ’AC/ACT399 is the logical equivalent of a quad 2-input multiplexer feeding into four edge-triggered flip-flops. A common Select input determines which of the two 4-bit words is accepted. The selected data enters the flip-flop on the rising

Contextual Info: SN74172 16-BIT MULTIPLE-PORT REGISTER FILE WITH 3-STATE OUTPUTS M A Y 1 9 7 2 — R E V ISE D M A R C H 1988 SN74172 . . . N PACKAGE Independent Reed/Write Addressing Permits TOP VIEW Simultaneous Reading and Writing • Organized as Eight Words of Tw o Bits Each

1gW ST

Abstract: 74172
Contextual Info: SN 74172 16-BIT MULTIPLE-PORT REGISTER FILE WITH 3-STATE OUTPUTS MAY 1972 —REVISED MARCH 1988 SN 74172 . . . N PACKAGE Independent Read/Write Addressing Permits Simultaneous Reading and Writing • TOP VIEW □ 1 O : 2 : 3 c 4 c 5 c 6 c 7 c 8 c 9 i Qb c 10

2CW 45

Contextual Info: — 14 0 - 16-B it M ultiple-port Register File 3-State 74 1 7 2 OATA WRITE/READ WRITE INPUTS WRITE ADDRESS •■'< ' AODRES&— \ ENABLE/ . ■ VgC 10* 20A 2CW 2W/R2 2W/R1 2W/R0 2GR 1W2 10A 2DA 2GW 2W/R2 ?W/R 1WO 106 2OB 1GW 1R2 HO 2GR 1R1 IRQ 1W1 1W0, 1CW .100

vdo 007 ads

Contextual Info: i3R H A R R IS U P 1 8 5 2 ^ s/3 S E M I C O N D U C T O R High-Reliability Byte-Wide Input/Output Port February 1992 Description Features • Static Silicon-Gate CMOS Circuitry • Parallel Buffer 8-Bit Data Register and • Handshaking Via Service Request

st9050

Abstract: BKC BKD ST9030 AN418 R243 R251 R255 ST-9050
Contextual Info:  APPLICATION NOTE EXTERNAL DMA MODE I/O DATA TRANSFER SYNCHRONIZED BY TIMER Pierre Guillemin INTRODUCTION ST9 provides a powerful features allowing DMA transfers between I/O port and Register file or memory spaces Program/Data memory . Furthermore DMA operations on I/O port can be done under handshake

JESD22-A114

Abstract: JESD22-A115 JESD78 PCA9555 SO24 SSOP24 TSSOP24
Contextual Info: INTEGRATED CIRCUITS PCA9555 16-bit I2C and SMBus I/O port with interrupt Product data File under Integrated Circuits ICL03 Philips Semiconductors 2001 May 07 Philips Semiconductors Product data 16-bit I2C and SMBus I/O port with interrupt PCA9555 PIN CONFIGURATION

i2c port expander

Abstract: JESD22-A114 JESD22-A115 JESD78 PCA9556 PCA9557 PCA9557D PCA9557PW
Contextual Info: INTEGRATED CIRCUITS PCA9557 8-bit I2C and SMBus I/0 port with reset Product data File under Integrated Circuits — ICL03 Philips Semiconductors 2001 Dec 12 Philips Semiconductors Product data 8-bit I2C and SMBus I/0 port with reset PCA9557 The system master can also invert the PCA9557 inputs by writing to

intel 8155

Abstract: HS1-81C55RH-8 8155 programmable peripheral interface 81C55 81c55 programmable peripheral interface HS-81C56RH 5962R9676601QXC 5962R9676601QYC 5962R9676601VXC 5962R9676601VYC
Contextual Info: HS-81C55RH, HS-81C56RH TM Data Sheet August 2000 File Number Radiation Hardened 256 x 8 CMOS RAM Features The HS-81C55/56RH are radiation hardened RAM and I/O chips fabricated using the Intersil radiation hardened SelfAligned Junction Isolated SAJI silicon gate technology.