2 MEGABIT Search Results

Contextual Info: Paradigm' L .T M lG 'iü 0D D D 3Ö 3 P D M 41028SA P D M 41028LA 177 1 Megabit Static RAM 256K x 4-Bit IPA T Features Description □ High speed access times Com'l: 1 2 ,1 5 ,1 7 ,2 0 and 25ns Ind'l: 1 5 ,1 7 ,2 0 ,2 5 , and 35ns M il: 1 5 ,1 7 ,2 0 ,2 5 , and 35ns

Contextual Info: SEE S G S D - • T E H t 7 [ì 2 cì 2 3 7 O t J M W S M O O i 3T4 ■ SGTH S fi S - T H O M S O N N g 0037b2b S M 2 T 7 C 2 1 - ^ / 3 - 2 *? CMOS 2 Megabit 256K x 8 UV EPROM and OTP ROM ■ VERY FAST ACCESS TIME: 80ns ■ COMPATIBLE WITH HIGH SPEED MICRO­

AM27C1024

Abstract: ZDA11 06780-007E AM27C1024-155
Contextual Info: ADV MICRO MEMORY 33E D • 0 5 5 7 5 5 6 Q O gflflH b 1 ■ A M D 4 * T - 4 6 - 1 3 - 2 9 ' T - 4 4 - l 3 - 2 5 r A m 2 7 C 1 2 Advanced Micro Devices 4 1 Megabit (65,536 x 16-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS ■ High Speed Flashrlte p ro gram m in g

Contextual Info: PARADIGM 1 Megabit Static RAM 128K x 8-Bit PDM41024S PDM41024L Features Description □ High speed access times Com'l: 20 ,2 5 ,3 5 and 45ns M il: 2 0 ,2 5 ,3 5 ,4 5 , and 55ns □ Low power operation - PDM41024S Active: 400mW typ. Standby: 150 mW (typ.)

TME 57

Contextual Info: M DI EDI8F82046C 2 MegxB SRAM Module ELECTRONIC DESIGNS N C 2 Megabits x 8 Static RAM CMOS, Module with Revolutionary Pinout I,Features 2 Meg x 8 bit CMOS Static Random Access Memory • Access Times 20 thru 35ns • TTL Compatible Inputs and Outputs • Fully Static, No Clocks

Contextual Info: DENSE-PAC 8 Megabit High Speed CMOS SRAM MICROSYSTEMS DPS256X32CV3./DPS256X32BV3 DESCRIPTIO N: The D P S 2 5 6 X 3 2 C V 3 / D P S 2 5 6 X 3 2 B V 3 "V E R S A -S T A C K " m odule is a revolutionary new high speed m em ory subsystem using Dense-Pac Microsystem s' ceramic Stackable Leadless Chip Carriers S L C O mounted on

TMP86FS49UG

Abstract: TB6558FLG TB6590FTG TB6593FNG TB6598FNG TC59YM916BKG TMP86FS64FG 27 mhz toy airplane TCA62735FLG toy motor Control IC
Contextual Info: TOSHIBA SEMICONDUCTOR BULLETIN EYE JUNE 2005 VOLUME 155 CONTENTS New Products The second generation 512-megabit XDR DRAM .2 Charge Pump White LED Driver with Constant Current Regulator .2

tx8205

Contextual Info: < DENSE-PAC MICROSYSTEMS ,p 8 Megabit High Speed CMOS SRAM DPS256X32CV3/DPS256X32BV3 DESCRIPTION: T h e D P S 2 5 6 X 3 2 C V 3 /D P S 2 5 6 X 3 2 BV3 "V E R S A -S T A C K " m o d u le is a re v o lu tio n a ry n e w h ig h speed m e m o ry subsystem us in g Dense-Pac

28F020

Abstract: A15C CAT28F020 a5c capacitor PLCC 32 intel package dimensions
Contextual Info: ££ Cost E ffective Solution fo r the 2 MB F lash C A T 2 8 F0 1 5 < = ^ T ^ L _ Y S - r L icen sed In tel second source 1.5 Megabit CMOS Flash Memory FEATURES • Fully Compatible to 2 MB Flash 28F020 - No hardware or software changes Stop Tim er for Program/Erase

Contextual Info: 82EDI EDI8F82046C ELECTRONIC D ESG N i N C . 2 MegxS SRAM Module 2 Megabits x 8 Static RAM CMOS, Module with Revolutionary Pinout F e a tu r e s 2 Meg x 8 bit CMOS Static The EDI8F82046C is a 16 Megabit CMOS Static RAM Random Access Memory based on four 512Kx8 Static RAMs mounted on a multi­

jedec 64-pin simm

Abstract: Dense pac
Contextual Info: 8 Megabit CMOS SRAM DENSE PAC D PS256X32 L/DPS2 56X32W/D PS2 56X32W A MiCROSYSTEM S DESCRIPTION: The D PS2 5 6 X 3 2 L/D PS2 5 6 X 3 2 W /D PS2 5 6 X 3 2 W A is a 256K x 32 high density, high-speed Static Random Access Memory SRAM module, intended for high performance

AT27C210

Abstract: A7105
Contextual Info: m C R TR LYST • ■ fff I S E M I C O N D U C T O R CAT27C210/CAT27C21 Ol 1 Megabit HIGH SPEED CMOS EPROM FEATURES ■ F ast R ead A ccess Tim es: -1 5 0 /1 7 0 /2 0 0 /2 5 0 n s C o m m e rcia l -1 7 0 /2 0 0 /2 5 0 n s (Ind ustrial) High S p eed P rog ram m in g: 100 ^s/w o rd

Contextual Info: DPS96122 □PM Dense-Pac Microsystems. Inc. 256K X 1 6 / 5 1 2 K X 8 C M O S SRAM MODULE O D ESCRIPTIO N: The D P S9 6 1 2 2 is a four megabit Static Random A c c e s s M e m o r y S R A M , c o m p le te w ith decoupling capacitors. It can be organized as

M27C1001

Contextual Info: 55E Æ 7 m J> 7 CI 2 CJ 2 3 7 0D37b05 S G S -1 H O M S O N * 7 / ìbO •S6TH S G S-THOMSON IÜKg»KQO gS 5 T-^ 6 -1 3 -2 ^ M27C1001 CMOS 1 Megabit (128K x 8 UV EPROM and OTP ROM ■ VERY FAST ACCESS TIME: 80ns ■ COMPATIBLE WITH HIGH SPEED MICRO­ PROCESSORS, ZERO WAIT STATE

D0000H-DFFFFH

Contextual Info: 2Meg SRAM/8Meg FLASH, 70ns, TSOP STACK 30A193-00 C 2 Megabit SRAM / 8 Megabit FLASH DP3SZ128512X16NY5 ADVANCED INFORMATION DESCRIPTION: The DP3SZ128512X16NY5 modules are a revolutionary new memory subsystem using Dense-Pac Microsystems’ TSOP stacking technology. The Module packs 2-Megabits of

Contextual Info: ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module Features • ■ ■ ■ ■ ■ ■ ■ 6 Low Power Micron 1M x 16 Synchronous Dynamic Random Access Memory Chips in one MCM User Configureable as "2" Independent 512K x 48 x 2 Banks

tw 2823

Abstract: CMOS+4068
Contextual Info: 2 56 K X 8 IDT7M4068 IDT7MB4068 BiCMOS/CMOS STATIC RAM MODULE Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • High density 2 megabit C M O S static RAM module • Equivalent to the JE D E C standard for future monolilhic 256K x 8 static RAMs

EDI8F82048C70BSC

Abstract: EDI8F82048C OMA210
Contextual Info: MSX EDI8F82048C 2 MegxS SRAM Module ELECTRONIC DESIGNS. M C 2Megabitsx8 Static RAM CMOS, Module Features The EDI8F82048C is a 16 megabit CMOS Static RAM based on sixteen 128Kx8 Static RAMs mounted on a multi-layered 2 Meg x 8 bit CMOS Static epoxy laminate FR4 substrate.

DL161

Abstract: DL162 DL163
Contextual Info: PRELIMINARY Am42DL16x2D Stacked Multi-Chip Package MCP Flash Memory and SRAM Am29DL16xD 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 2 Mbit (128 K x 16-Bit) Static RAM DISTINCTIVE CHARACTERISTICS MCP Features

diode ba10 equivalents

Abstract: ACT-D1M96S
Contextual Info: ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module Features • ■ ■ ■ ■ ■ ■ ■ 6 Low Power Texas Instruments 1M X 16 Synchronous Dynamic Random Access Memory Chips in one MCM User Configureable as "2" Independent 512K X 48 X 2

1431 T

Abstract: 56TAL
Contextual Info: DENSE-PAC 16 Megabit CM O S SRAM M I C R O S Y S T E M S D P S 5 1 2 X 3 2 M L /D P S 5 12 X 3 2 M W PR ELIM IN A R Y D ESCRIPTIO N : P IN -O U T DIAGRAM The DPS512X32M L/DPS512X 32M W is a 512K x 32 high density, high-speed Static Random Access M em ory SRAM module, intended

Contextual Info: 8 Megabit CM OS SRAM □PM Dense-Pac Microsystems. Inc. q DPS256S32W P IN -O U T D IA G R A M DESCRIPTION: T h e D P S 2 5 6 S 3 2 W is a 2 5 6 K X 32 high-density, low -pow er static R A M m odule co m prised o f eight 1 28K X 8 m onolithic SR A M 's, an ad van ced high-speed C M O S

Contextual Info: DENSE-PAC MICROSYSTEMS 2 Megabit High Speed CMOS SRAM D P S 1 2 8 X 1 6C n3/D PS12 8 X 1 6Bn3 DESCRIPTION: The DPS128X16Cn3/DPS128X16Bn3 High Speed SRAM "STACK" modules are a revolutionary new memory subsystem using Dense-Pac Microsystems' ceramic Stackable Leadless Chip Carriers

Contextual Info: W D EDI8F82045C \ 2Megx8 SRAM Module ELECTRONIC DESIGNS, INC. Features 2 Megabits x 8 Static RAM CMOS, Module 2 Meg x 8 bit CMOS Static The EDI8F82045C is a 16 megabit CMOS Static RAM based Random Access Memory on four 512Kx8 Static RAMs mounted on a multi-layered