1X111 Search Results

atmel100

Abstract: AT25DQ321 AT25DQ161 AT25DQ
Contextual Info: Atmel AT25DQ161 16-Mbit, 2.7V Minimum SPI Serial Flash Memory with Dual-I/O and Quad-I/O Support Features DATASHEET Not Recommended for New Designs Use AT25DQ321  Single 2.7V - 3.6V supply  Serial Peripheral Interface SPI compatible Supports SPI Modes 0 and 3

AT25DF081A

Abstract: AT25DF081A-SH AT25DF081A-SSH-T 8715a
Contextual Info: Features • Single 2.7V - 3.6V Supply • Serial Peripheral Interface SPI Compatible • • • • • • • • • • • • • • • • – Supports SPI Modes 0 and 3 – Supports RapidS Operation – Supports Dual-Input Program and Dual-Output Read

AT25DL081

Contextual Info: Atmel AT25DL081 8-Mbit, 1.65V Minimum SPI Serial Flash Memory with Dual-I/O Support DATASHEET Features  Single 1.65V - 1.95V supply  Serial Peripheral Interface SPI compatible    Supports SPI Modes 0 and 3 Supports Atmel RapidS operation

AT26DF161A-SSU

Abstract: AT26DF161A AT26DF161A-MU AT26DF161A-SU
Contextual Info: Features • Single 2.7V - 3.6V Supply • Serial Peripheral Interface SPI Compatible – Supports SPI Modes 0 and 3 • 70 MHz Maximum Clock Frequency • Flexible, Uniform Erase Architecture • • • • • • • • • • – 4-Kbyte Blocks – 32-Kbyte Blocks

Contextual Info: User Manual October 1998 group Lucent Technologies Bell Labs Innovations 497AE and 1215E Boundary-Scan Master 2 Advanced Operational Mode Features • The BSM2 is available in 2 versions: — The 497AE is available in a 28-pin SOJ pack­ age. — The 1215E device is available in a 48-pin TQFP

AT25DF081-SSHN-B

Abstract: 009F
Contextual Info: Features • Single 1.65V - 1.95V Supply • Serial Peripheral Interface SPI Compatible – Supports SPI Modes 0 and 3 • 66 MHz Maximum Clock Frequency • Flexible, Uniform Erase Architecture • • • • • • • • • • – 4-Kbyte Blocks

AT26DF081A

Abstract: AT26DF081A-SSU AT26DF081A-SU
Contextual Info: Features • Single 2.7V - 3.6V Supply • Serial Peripheral Interface SPI Compatible – Supports SPI Modes 0 and 3 • 70 MHz Maximum Clock Frequency • Flexible, Uniform Erase Architecture • • • • • • • • • • – 4-Kbyte Blocks – 32-Kbyte Blocks

AT26DF321

Abstract: 16-SOIC
Contextual Info: Features • Single 2.7V - 3.6V Supply • Serial Peripheral Interface SPI Compatible – Supports SPI Modes 0 and 3 • 66 MHz Maximum Clock Frequency • Flexible, Uniform Erase Architecture • • • • • • • • • – 4-Kbyte Blocks – 32-Kbyte Blocks

AT26DF161

Contextual Info: Features • Single 2.7V - 3.6V Supply • Serial Peripheral Interface SPI Compatible – Supports SPI Modes 0 and 3 • 66 MHz Maximum Clock Frequency • Flexible, Uniform Erase Architecture • • • • • • • • • • – 4-Kbyte Blocks – 32-Kbyte Blocks

AT25DF321

Abstract: AT26DF321 16-SOIC AT25DF321A
Contextual Info: Features • Single 2.7V - 3.6V Supply • Serial Peripheral Interface SPI Compatible – Supports SPI Modes 0 and 3 • 66 MHz Maximum Clock Frequency • Flexible, Uniform Erase Architecture • • • • • • • • • • – 4-Kbyte Blocks – 32-Kbyte Blocks

Contextual Info: T D A 91 0 9 /N LOW-COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS HORIZONTAL • SELF-ADAPTATIVE ■ DUALPLLCONCEPT ■ 150kHz MAXIMUM FREQUENCY ■ X-RAY PROTECTION INPUT ■ l2C CONTROLS : H-POSITION, FREQUENCY GENERATOR FOR BURN-IN MODE VERTICAL ■ VERTICAL RAMP GENERATOR

Contextual Info: {Z T SGS-THOMSON JÆ , I M » I [ L I ^ [ M i * T D A 9 1 0 9 /N LOW-COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS HORIZONTAL • SELF-ADAPTATIVE ■ DUALPLLCONCEPT ■ 150kHz MAXIMUM FREQUENCY ■ X-RAY PROTECTION INPUT ■ l2C CONTROLS : H-POSITION, FREQUENCY

Contextual Info: S G S -T H O M S O N Q œ[llL[iCTffi[i 0© i TD A7311 SERIAL BUS CONTROLLED AUDIO PROCESSOR • INPUT MULTIPLEXER - TWO STEREO DIFFERENTIAL INPUTS - TWO STEREO SINGLE ENDED INPUTS - ONE MONO DIFFERENTIAL INPUT ■ INPUT AND OUTPUT FOR EXTERNAL EQUALIZER OR NOISE REDUCTION SYS­

T7275

Contextual Info: w # S G S -T H O M S O N TDA9106A [^ D Œ Q [iL [E ( g î^ W D ( g @ LOW COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS PRELIM IN ARY DATA HORIZONTAL • SELF-ADAPTATIVE - D U A LP LLC O N C E P T - 150kHz MAXIMUM FREQUENCY - X-RAY PROTECTION INPUT - I2C CONTROLS : HORIZONTAL POSITION,

Contextual Info: User Manual September 1998 group Lucent Technologies Bell Labs Innovations 497AE and 1215E Boundary-Scan Master 2 Advanced Operational Mode F e a tu re s • The BSM2 is available in 2 versions: — The 497AE is available in a 28-pin SOJ pack­ age. — The 1215E device is available in a 48-pin TQFP

flyback uc3842 power supply

Abstract: BC557 transistor pin details BC557 UC3842 smps design TDA9109 TDA9109A TDA9206 PHILIPS tv FLYBACK Circuit Diagram schematics transistor horizontal section tv pnp transistor crt high definition
Contextual Info: TDA9109A I2C CONTROLLED DEFLECTION PROCESSOR FOR MULTISYNC MONITORS PRELIMINARY DATA . . . HORIZONTAL SELF-ADAPTATIVE DUAL PLL CONCEPT 150kHz MAXIMUM FREQUENCY X-RAY PROTECTION INPUT I2C CONTROLS : HORIZONTAL DUTY-CYCLE, H-POSITION, FREE RUNNING FREQUENCY,

TDA9110

Abstract: TDA9206
Contextual Info: SGS-THOMSON TDA9110 [^□ [^©[ICLiCgTr^MO©© LOW-COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS PRO DUCT PREVIEW HORIZONTAL • EXTREMELY LOW JITTER LEVEL - SELF-ADAPTATIVE - D U A LP LLC O N C E P T - 150kHz MAXIMUM FREQUENCY - X-RAY PROTECTION INPUT

am29203 "evaluation board"

Abstract: L0512 MV8000 TTL catalog CL1101 8038 ic tester circuit diagram tl 2345 ml gcr encoder parallel bus arbitration 30GRAMMABLE
Contextual Info: PROGRAMMABLE ’ROGRAMMABLE 30GRAMMABLE L DGRAMMABLE LG 3RAMMABLE LOG ÏRAMMABLE LOGI ÌAMMABLE LÄGIC a Advanced Micro Devices Programmable Array Logic Handbook Prepared by the Product Planning and Applications Staff at Advanced M icro Devices, Inc. Brad Kitson, Editor

AT25DF021-MHF-T

Abstract: at25df021-ssh-b
Contextual Info: Features • Single 2.3V - 3.6V or 2.7V - 3.6V Supply • Serial Peripheral Interface SPI Compatible – Supports SPI Modes 0 and 3 • 70 MHz Maximum Operating Frequency • • • • • • • • • • • • • – Clock-to-Output (tV) of 6 ns Maximum

AT25DF641

Abstract: 009F 16-SOIC VDFN 8MW1 VDFN
Contextual Info: Features • Single 2.7V - 3.6V Supply • Serial Peripheral Interface SPI Compatible • • • • • • • • • • • • • • • • • – Supports SPI Modes 0 and 3 – Supports RapidS Operation – Supports Dual-Input Program and Dual-Output Read

DIP40

Abstract: TDA7311
Contextual Info: TDA7311  SERIAL BUS CONTROLLED AUDIO PROCESSOR INPUT MULTIPLEXER – TWO STEREO DIFFERENTIAL INPUTS – TWO STEREO SINGLE ENDED INPUTS – ONE MONO DIFFERENTIAL INPUT INPUT AND OUTPUT FOR EXTERNAL EQUALIZER OR NOISE REDUCTION SYSTEM VOLUME CONTROL IN 1.25dB STEPS

Contextual Info: Features • Single 2.7V - 3.6V Supply • Serial Peripheral Interface SPI Compatible – Supports SPI Modes 0 and 3 • 70 MHz Maximum Clock Frequency • Flexible, Uniform Erase Architecture • • • • • • • • • • – 4-Kbyte Blocks – 32-Kbyte Blocks

BUS CONTROLLED VERTICAL DEFLECTION SYSTEM

Abstract: operation of BC557 TRANSISTOR SCL SDA VSYNC HSYNC PXCK image BC557 pin description L 9106 components in horizontal output eps CONTROLLER G5676-00 horizontal output 5 pin voltage comparator IC
Contextual Info: TDA9106 LOW COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS PRELIMINARY DATA . . . . . . . . . VERTICAL VERTICAL RAMP GENERATOR 50 TO 165Hz AGC LOOP GEOMETRY TRACKING WITH V-POS & AMP I2C CONTROLS : V-AMP, V-POS, S-CORR, C-CORR 2 I C GEOMETRY CORRECTIONS

D720101

Abstract: NEC uPD TMS9914 UPD7210C ACS 7121 nec7210 nec upd ic DIL40 UPD 40pin upd7210
Contextual Info: ines-ieee488.2 iGPIB Hardware Manual  1998 ines GmbH and IAD GmbH All rights reserved. No part of this document may be reproduced without permission in writing from the publisher. Hannover Germany , October, 1998 Revision 1.4 March 2001 Contents 1. Introduction . . . . 4