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Contextual Info: T R I Q U I N T S E M I C O N D U C T O R , I N C 7QS1 G A 1 1 1 0 E Figure 1. Block Diagram VDD CLKIN FBIN SO TO GND Multi-Phase Clock Buffer Features • Zero-propagation-delay clock buffer » Output skew controlled to ±250 ps typ. , ± 500 ps (max.) TriQuint’s GA1110E is a low-skew TTL-level clock buffer chip with multi­