1OF32 Search Results

54ac138

Abstract: AC138 54ACT138 ACT138
Contextual Info: 54AC138 • 54ACT138 1-of-8 Decoder/Demultiplexer General Description Features The ’AC/’ACT138 is a high-speed 1-of-8 decoder/ demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder

Contextual Info: HD74AC138/HD74ACT138 Description • 1 - o f- 8 Decoder/Demultiplexer Pin Assignment The HD74AC138/HD74ACT138 is a high-speed l-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow

138B

Contextual Info: PERFORMANCE SEMICONDUCTOR 20E D P33PCT138,138A, 138B HIGH SPEED 1-OF-8 DECODER A • TOLSST? OOOISbb 2 ■ â vâM BE OMF@ raiMiATB@M T - ^ - 3 L |- ^ r - - 1

FT138-1

Contextual Info: CY54FCT138T, CY74FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 CY54FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

ADG732

Abstract: ADG726 S16A S16B design of 16-1 multiplexer SU48 6-PIN s9ad
Contextual Info: a 16-/32-Channel, 4 ⍀ +1.8 V to +5.5 V, ؎2.5 V Analog Multiplexers ADG726/ADG732 FEATURES 1.8 V to 5.5 V Single Supply ؎2.5 V Dual-Supply Operation 4 ⍀ On Resistance 0.5 ⍀ On Resistance Flatness 48-Lead TQFP or 48-Lead 7 mm ؋ 7 mm CSP Packages Rail-to-Rail Operation

74F538

Abstract: MC54 MC74FXXXDW
Contextual Info: 1-OF-8 DECODER WITH 3-STATE OUTPUTS The MC54 / 74F538 decoder/demultiplexer accepts three Address A0 – A2 input signals and decodes them to select one of eight mutually exclusive outputs. A polarity control input (P) determines whether the outputs are active

Contextual Info: Revised Ju ly 1999 e m ic d n d u c t d r t m 74F138 1-of-8 Decoder/Demultiplexer General Description Features The F138 is a high-speed 1-of-8 decoder/dem ultiplexer. This device is ideally suited for high-speed bipolar m em ory chip select address decoding. The m ultiple input enables

54FCT138T

Contextual Info: IDT54/74FCT138T/AT/CT FAST CMOS 1-OF-8 DECODER WITH ENABLE MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 1-OF-8 DECODER WITH ENABLE DESCRIPTION: FEATURES: • • • • • • • • • IDT54/74FCT138T/AT/CT The IDT54/74FCT138T is a 1-of-8 decoder built using an advanced

Contextual Info: CY54FCT138T, CY74FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 CY54FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

93Z565

Contextual Info: F a ir c h ild A Schlumberger Company 93Z564/93Z565 8192 x 8-Bit Programmable Read Only Memory M em ory and High Speed Logic Connection Diagrams 24-pin DIP Top View Description The 93Z564 and 93Z565 are fu lly decoded 65,536-bit Program m able Read O nly Mem ories (PROMs),

act 138

Contextual Info: & Semiconductor March 1993 54AC/74AC138 • 54 ACT/74 ACT 138 1-of-8 Decoder/Demultiplexer General Description Features The ’A C /’ACT138 is a high-speed 1-of-8 decoder/demulti­ plexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input

Contextual Info: IDT54/74FCT138T/AT/CT FAST CMOS 1-OF-8 DECODER WITH ENABLE MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 1-OF-8 DECODER WITH ENABLE IDT54/74FCT138T/AT/CT FEATURES: DESCRIPTION: − − − − The IDT54/74FCT138T is a 1-of-8 decoder built using an advanced

74HC_HCT138

Abstract: 74HC138 data sheet 74HC138 EQUIVALENT 74HCT138 74HC138DB 74HC138N hct138d 74HC138 philips 74HCT138 74HC138PW
Contextual Info: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 03 — 23 December 2005 Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1

Contextual Info: 54F 74F138 1-of-8 Decoder Demultiplexer General Description Features The ’F138 is a high-speed 1-of-8 decoder demultiplexer This device is ideally suited for high-speed bipolar memory chip select address decoding The multiple input enables allow parallel expansion to a 1-of-24 decoder using just

CY74FCT138ATQCT

Abstract: CY74FCT138CTQCT
Contextual Info: Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY54/74FCT138T 1-of-8 Decoder SCCS013 - May 1994 - Revised February 2000 Features • Function, pinout, and drive compatible with FCT and F logic

5 to 32 decoder using 4 t0 16 decoders

Abstract: 74HC-HCT138
Contextual Info: 74H C/H CT138 MSI 3-TO-8 LINE DECODER/DEMULTIPLEXER; INVERTING FEATU RES • • T Y P IC A L D em ultiplexing capability Ideal fo r m em ory chip select decoding U N IT C O N D IT IO N S HC Active LO W m utually exclusive outputs • O u tp u t capability: standard

demultiplexer 1 to 4 outputs HF

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA L o w -V o ltag e Q uiet CMOS 1 -o f-8 D ecoder/D em ultiplexer M C74LVQ 138 LVQ The MC74LVQ138 is a high performance, 1-of-8 decoder/ demultiplexer operating from a 2.7 to 3.6V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers

74AC11238

Contextual Info: 74AC/ACT 11238 Signetics 3-to-8 Line D ecoder/ Demultiplexer Product Specification ACL Products GENERAL INFORMATION FEATURES • Multiple input enable for easy expansion • Ideal for memory chip select decoding • Non-Inverting outputs SYMBOL w l PHL CPD

TK 69 TSOP

Abstract: 1024KX16 M5M4V16169RT-10 1-OF-128 7WB1 AD011 M5M4V16169TP-10
Contextual Info: MITSUBISHI LSIs TARGET SPEC REV. 2.0 M5M4V16169RT-10,-12,-15 16MCDRAM:16M(1024K-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM Preliminary This document is a preliminary Target Spec. and some of the contents are subject to change without notice.

74LV238

Abstract: 74LV138 74LV138PW SV00524
Contextual Info: INTEGRATED CIRCUITS 74LV138 3-to-8 line decoder/multiplexer; inverting Product specification IC24 Data Handbook Philips Semiconductors 1997 Feb 03 Philips Semiconductors Product specification 3-to-8 line decoder/demultiplexer; inverting FEATURES 74LV138 DESCRIPTION

74AC

Abstract: AC138 1/74AC 138 smd
Contextual Info: & March 1993 Semiconductor 54A C /7 4AC 138 • 54ACT/74ACT138 1-of-8 Decoder/Demultiplexer General Description Features The ’A C /’A C T138 is a high-speed 1-of-8 d eco d e r/d e m u lti­ plexer. T h is device is ideally suited fo r high-speed bipolar

74LV138

Abstract: 74LV138PW MS-012AC KXJ 71
Contextual Info: Philips Semiconductors Product specification 3-to-8 line decoder/demultiplexer; inverting 74LV138 FEATURES DESCRIPTION • W ide operating voltage: 1.0 to 5.5 V The 74LV138 is a low-voltage Si-gate CM OS device that is pin and function com patible with 74H C /H C T138.

LVX138

Abstract: 74LVX138 74LVX138M 74LVX138MTC 74LVX138MTCX 74LVX138MX 74LVX138SJ 74LVX138SJX M16A M16D
Contextual Info: 74LVX138 Low Voltage 1-of-8 Decoder Demultiplexer General Description Features The LVX138 is a high-speed 1-of-8 decoder demultiplexer This device is ideally suited for high-speed bipolar memory chip select address decoding The multiple input enables allow parallel expansion to a 1-of-24 decoder using just

54ACT138

Abstract: 54ACT138DMQB 54ACT138FMQB 54ACT138LMQB J138
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 07/02/96 Last Update Date: 03/17/97 Last Major Revision Date: 07/02/96 MN54ACT138-X REV 1B0 1-of-8 Decoder/Demultiplexer General Description The ACT138 is a high-speed 1-of-8 decoder / demultiplexer. This device is ideally suited