1CY2 Search Results

ramps 1.4

Abstract: CY24126 CY24126SC lcd 3901 PLL 2400 MHZ
Contextual Info: PRELIMINARY CY24126 MediaClock for LCD Projectors 1CY2295 Features Benefits • Integrated phase-locked loop High-performance PLL tailored for projector applications • Low jitter, high accuracy outputs Meets critical timing requirements in complex system designs

CY28316

Abstract: CY28317-2 CY28317PVC-2 CY28317PVC-2T CY28317ZC-2 CY28317ZC-2T ILB1206 PLE133T 1CY2
Contextual Info: CY28317-2 FTG for Mobile VIA PL133T and PLE133T Chipsets 1CY28317-2 Features • Single-chip system frequency synthesizer for mobile VIA PL133T and PLE133T chipsets • Programmable clock output frequency with less than 1 MHz increment • Vendor ID and Revision ID support

CY28316

Abstract: ILB1206 PLE133T
Contextual Info: 1CY28316 CY28316: 12/00 Revision: March 28, 2001 PRELIMINARY CY28316 FTG for VIA PL133T and PLE133T Features • Single-chip system frequency synthesizer for VIA PL133T and PLE133T chipsets • Programmable clock output frequency with less than 1 MHz increment

23S08

Abstract: CY2308 CY23S08 REF05
Contextual Info: 1CY23S08 CY23S08 3.3V Zero Delay Buffer Features • Zero input-output propagation delay, adjustable by capacitive load on FBK input • Multiple configurations, see Table 2 • Multiple low-skew outputs — Output-output skew less than 200 ps — Device-device skew less than 700 ps

CY2213

Abstract: CY2213ZC-1 CY2213ZC-1T CY2213ZC-2 CY2213ZC-2T
Contextual Info: CY2213 High-Frequency Programmable PECL Clock Generator 1CY2213 Features Benefits • Jitter peak-peak TYPICAL = 35 ps High-accuracy clock generation • LVPECL output One pair of differential output drivers • Default Select option Phase-locked loop (PLL) multiplier select

CY28159

Abstract: CY28159PVC CY28159PVCT CY28159ZC CY28159ZCT ILB1206 dmg cpu
Contextual Info: 1CY28159 CY28159 Clock Generator for Serverworks Grand Champion Chipset Applications Features • • • • • All outputs compliant with Intel specifications • External resistor for current reference • Selection logic for differential swing control, test mode,

AMD 700 chipset

Abstract: AMD-750 CY22K7 CY22K7PVC-1
Contextual Info: THIS SPEC IS OBSOLETE Spec No: 38-07333 Spec Title: CY22K7 133-MHz Spread Spectrum Clock Generator For Use With the AMD-K7 Processor and AMD-750 Chipset Sunset Owner: Rose Galindez RGL Replaced by: None [+] Feedback 1CY22K7 CY22K7 133-MHz Spread Spectrum Clock Generator For Use With

ansi-y14.5m-1982

Contextual Info: 1CY2310NZCY2310 NZCY2313BNZ CY2313BNZ 13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs Features Functional Description • One input to 13 output buffer/driver • Supports up to three SDRAM DIMMs • One additional outputs for feedback • SMBus interface for output control

Signal Path Designer

Contextual Info: 1CY2509/10 CY2509/10 Spread Aware , Ten/Eleven Output Zero Delay Buffer Features Key Specifications • Spread AwareTM—designed to work with SSFTG reference signals • Well suited to both 100- and 133-MHz designs • Ten CY2509 or eleven (CY2510) LVCMOS/LVTTL

Contextual Info: 1CY2303 CY2303 Phase-Aligned System Clock Features Benefits • 3-multiplier configuration 1x, 2x, 4x Ref • Single phase-locked loop architecture 10 MHz to 166.67 MHz operating range reference input from 10 MHz to 41.67 MHz • Phase Alignment All outputs will have a consistent phase relationship with each

CY26187-1

Contextual Info: CY26187-1 PRELIMINARY Broadcom Reference Design Clock Generator 2CY26187-1-1CY2295 Features Benefits • Integrated phase-locked loop Highest performance PLL tailored for multimedia applications • Low skew, low jitter, high accuracy outputs Meets critical timing requirements in complex system designs

CY2309NZ

Abstract: CY2309NZSI-1H
Contextual Info: 1CY2309NZ CY2309NZ Nine Output, 3.3V Buffer Features Functional Description • One input to nine output buffer/driver • Supports two DIMMs or four SO-DIMMs with one additional output for feedback to an external or chipset PLL • Low power consumption for mobile applications

CY2308SXC-1

Abstract: CY2308SXI-1H CY2308 CY2308SI-XX CY2308SXI
Contextual Info: 1CY2308 CY2308 3.3V Zero Delay Buffer Features • Zero input-output propagation delay, adjustable by capacitive load on FBK input • Multiple configurations, see “Available CY2308 Configurations” table • Multiple low-skew outputs — Output-output skew less than 200 ps

Contextual Info: CY28159 Clock Generator for Serverworks Grand Champion Chipset Applications 1CY28159 Features • Eight differential CPU clock outputs • All outputs compliant with Intel specifications • One PCI output • External resistor for current reference • One 14.31818 MHz reference clock

Contextual Info: 1CY2254A CY2254A Pentium Processor Compatible Clock Synthesizer/Driver Features • Freq. stability = 0.01% max. • Multiple clock outputs to meet requirements of most Pentium® motherboards — Four pin-selectable CPU clocks @ 66.66 MHz, 60.0 MHz, and 50.0 MHz for support of Intel Triton PCIset

Contextual Info: CY22150F PRELIMINARY One-PLL General Purpose FLASH Programmable and 2-Wire Serially Programmable Clock Generator 1CY2295 Features Benefits • Integrated phase-locked loop PLL Internal PLL to generate 6 outputs up to 200 MHz. Able to generate custom frequencies from an external crystal or a driven source.

Contextual Info: 1CY2220 CY2220 133-MHz Spread Spectrum Clock Synthesizer/Driver with Differential CPU Outputs Features Benefits • Compliant to Intel CK00 Clock Synthesizer/Driver Specifications Supports next generation Pentium® processors using differential clock drivers

REF05

Contextual Info: 1CY2308 CY2308 3.3V Zero Delay Buffer Features • Zero input-output propagation delay, adjustable by capacitive load on FBK input • Multiple configurations, see “Available CY2308 Configurations” table • Multiple low-skew outputs — Output-output skew less than 200 ps

ILB1206

Abstract: CY28159 CY28159PVC CY28159PVCT CPU44
Contextual Info: CY28159 Clock Generator for Serverworks Grand Champion Chipset Applications 1CY28159 Features • Eight differential CPU clock outputs • All outputs compliant with Intel specifications • One PCI output • External resistor for current reference • One 14.31818 MHz reference clock

CY2280

Abstract: CY2281 CY2313ANZ NZCY2313ANZ
Contextual Info: 1CY2310NZCY2310 NZCY2313ANZ CY2313ANZ 13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs Features Functional Description • One input to 13 output buffer/driver • Supports up to three SDRAM DIMMs • One additional outputs for feedback • Serial interface for output control

Contextual Info: 1CY2303 CY2303 Phase-Aligned Clock Multiplier Features Benefits • 3-multiplier configuration 1x, 2x, 4x Ref • Single phase-locked loop architecture 10 MHz to 166.67 MHz operating range reference input from 10 MHz to 41.67 MHz • Phase Alignment All outputs will have a consistent phase relationship with each

CY28316

Abstract: CY28317 ILB1206 PLE133T
Contextual Info: PRELIMINARY CY28317 FTG for Mobile VIA PL133T and PLE133T Chipsets 1CY28317 Features • Single-chip system frequency synthesizer for mobile VIA PL133T and PLE133T chipsets • Programmable clock output frequency with less than 1 MHz increment • Integrated fail-safe Watchdog Timer for system recovery

Contextual Info: 1CY2210 CY2210 133 MHz Spread Spectrum Clock Synthesizer/Driver with AGP, USB, and DRCG Support Features Benefits Usable with Pentium II and Pentium® III processors • Mixed 2.5V and 3.3V Operation • Compliant to Intel® CK133 CY2210-3 & CK133W (CY2210-2) synthesizer and driver specification

CY28316

Abstract: CY28317-2 CY28317PVC-2 CY28317PVC-2T CY28317ZC-2 CY28317ZC-2T ILB1206 PLE133T
Contextual Info: CY28317-2 FTG for Mobile VIA PL133T and PLE133T Chipsets 1CY28317-2 Features • Single-chip system frequency synthesizer for mobile VIA PL133T and PLE133T chipsets • Programmable clock output frequency with less than 1 MHz increment • Vendor ID and Revision ID support