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    CFG 3000

    Abstract: AT1394A-SSF8010 CRC32 block diagram for asynchronous FIFO
    Contextual Info: Features • • • • • • • • • • • • • • • Link Layer Functionality Uses Annex J to Interface with PHY Chip Supports Asynchronous and Isochronous Transfers Supports 100, 200 and 400 Megabits per Second Mpbs Simple Application Interface


    Original     		CRC32 IEEE1394a AT1394A-SSF8010 1923AS CFG 3000 block diagram for asynchronous FIFO PDF