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    18NOV2002 Search Results

    18NOV2002 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    M48T129V

    Abstract: M48T129Y
    Contextual Info: M48T129Y M48T129V 5.0 or 3.3 V, 1 Mbit 128 Kbit x 8 TIMEKEEPER SRAM Features • Integrated, ultra low power SRAM, real-time clock, power-fail control circuit, battery, and crystal ■ BCD coded century, year, month, day, date, hours, minutes, and seconds


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    m48t129ym48t129v PDF

    Contextual Info: M27W064 64 Mbit 4Mb x16 3V Supply FlexibleROM Memory NOT FOR NEW DESIGN FEATURES SUMMARY • ONE TIME PROGRAMMABLE ■ Figure 1. Packages SUPPLY VOLTAGE – VCC = 2.7 to 3.6V for Read – VPP = 11.4 to 12.6V for Program ■ ACCESS TIME ■ – 90ns at VCC = 3.0 to 3.6V


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    m27w064110ns0020h888ah+1tsop48 PDF

    Contextual Info: M27W064 64 Mbit 4Mb x16 3V Supply FlexibleROM Memory PRELIMINARY DATA FEATURES SUMMARY ONE TIME PROGRAMMABLE Figure 1. Packages SUPPLY VOLTAGE – VCC = 2.7 to 3.6V for Read – VPP = 11.4 to 12.6V for Program ACCESS TIME – 90ns at VCC = 3.0 to 3.6V


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    m27w064110ns0020h888ah+1tsop48 PDF

    Contextual Info: M48Z512A M48Z512AY, M48Z512AV 4 Mbit 512 Kbit x 8 ZEROPOWER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of


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    m48z512am48z512aym48z512avpmdip32+2m48z512a/y/v304-bny PDF

    vogt transformer 406 69

    Abstract: VOGT 406 69 sck-053 transformer ee28 THERMISTOR, sck-053 545 01 122 00 vogt sck053 vogt 406 47 vogt 406 59 vogt transformer 406
    Contextual Info: Title Engineering Prototype Report for EP-33 – 45 W LCD Monitor External Power Supply using TOP247Y TOPSwitch-GX Specification 90 - 265 VAC Input, 12 V, 3.75 A, 45 W Output Applications LCD Monitor / TV and Generic External Adapter Author Power Integrations Applications Department


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    ep-33op247yepr-3328-mar-03+11cispr22vogt transformer 406 69vogt 406 69sck-053transformer ee28thermistor, sck-053545 01 122 00 vogtsck053vogt 406 47vogt 406 59vogt transformer 406 PDF

    M68x

    Contextual Info: M48Z512A M48Z512AY, M48Z512AV 4 Mbit 512 Kbit x 8 ZEROPOWER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of


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    m48z512am48z512aym48z512avpmdip32+1m68x PDF

    Contextual Info: M27W064 64 Mbit 4Mb x16 3V Supply FlexibleROM Memory FEATURES SUMMARY ONE TIME PROGRAMMABLE Figure 1. Packages SUPPLY VOLTAGE – VCC = 2.7 to 3.6V for Read – VPP = 11.4 to 12.6V for Program ACCESS TIME – 90ns at VCC = 3.0 to 3.6V – 100, 110ns at VCC = 2.7 to 3.6V


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    m27w064110ns0020h888ah+1tsop48 PDF

    M48Z512A

    Abstract: M48Z512AV M48Z512AY M48Z512BV
    Contextual Info: M48Z512A M48Z512AY, M48Z512AV 4 Mbit 512 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of


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    m48z512am48z512aym48z512avm48z512bv+1m48z512a/y/v PDF

    Contextual Info: M48Z128 M48Z128Y 5.0 V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of


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    m48z128m48z128ypmdip32 PDF

    ZVN2106A

    Abstract: HEADER 7X2 560pF DISP1103BS HVQFN14 HVQFN16 ISP110X JP13 JP15 con1
    Contextual Info: A B C D 2 4 6 8 10 12 14 2 4 6 1 Pin #6 Pin #12 Pin #11 U2 Vcc I/O HEADER 3X2 1 3 5 JP12 C14 18pF Control I/O_HVQFN16 C16 18pF O\E\ RCV PIN #3 PIN #4 SUSPND PIN #8 SOFTCON O\E\ RCV VP/VPO VM/VMO SUSPND VBUSDET SOFTCON C15 18pF U2 U1 Control I/O_HVQFN14 HEADER 7X2


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    hvqfn16hvqfn14isp1103bs18-nov-2002+10\isp110xhqvfn14zvn2106aheader 7x2560pfdisp1103bsisp110xjp13jp15con1 PDF

    Contextual Info: 7 8 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT - RELEASED FOR PUBLICATION 6 5 4 3 2 - LOC - ALL RIGHTS RESERVED. - 1 REVISIONS DIST - P LTR F 4.9 D HOUSING 7.2 REF 16.1 14.4 DATE REV PER ECO 14-003443 HOUSING: LCP, UL94V0, COLOR: BLACK. CONTACT: PHOSPHOR BRONZE.


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    13nov200218nov2002 PDF

    114-13056

    Abstract: ENG_CD_1410187_F
    Contextual Info: 7 8 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT - RELEASED FOR PUBLICATION 6 5 4 3 2 - LOC BY - REVISIONS DIST - ALL RIGHTS RESERVED. 1 - P LTR D 11.81 0.19 HOUSING DATE REV PER ECO 14-003443 DWN HOUSING: LCP, UL94V0, COLOR: BLACK. CONTACT: PHOSPHOR BRONZE. POST: BRASS WIRE


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    114-13056eng_cd_1410187_f PDF

    Contextual Info: 2 THIS £L D R A WI N G IS UNPUBLISHED. RELEASED BY C O P Y R I G H T 20 TYCO ELECTRONICS CORPORATION. ALL FOR PUBLICATION R 1G H T S 20 LOC GP RESERVED. R E V I S I ONS DIST 00 LTR DESCRIPTION DATE REV PER E C O - 0 8 - 0 2 4 5 8 5 HOUSING: L CP, UL 9 4 V 0 , COLOR:


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    copyright20eco-08-024585020ct2008i4nov2002+3i8nov2002i4mar20063imar2000 PDF

    Contextual Info: 2 THIS C DRAWING IS U N P U B L I S H E D . C O P Y R I G H T 20 BY RELEASED ALL - FOR PUBLICATION RIGHTS 20 LO C RESERVED. GP DIST REVISIONS 00 LTR DESCRIPTION REVISED B I PER ECO-I H O U S I N G : LCP, U L 9 4 V 0 , C O L O R : CONTACT: P H O S P H O R BRONZE.


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    05nov2002i8nov2002i4mar2006 PDF

    Contextual Info: 2 THIS C D R A WI N G IS C O P Y R I G H T 20 UNPUBLISHED. BY RELEASED FOR ALL - PUBLICATION RI GHTS 20 LOC R ES ERVED. DIST REVISIONS 00 GP LTR DESCRIPTION REVISED A3 PER DATE 04MAY2012 ECO-I 2-008364 HOUSING: LCP, UL94V0, COLOR: CONTACT: PHOSPHOR BRONZE.


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    ay201ul94v076jjmi4nqv2002+218nov200214mar2006 PDF

    M48T129Y

    Abstract: STMicroelectronics
    Contextual Info: M48T129Y M48T129V 5.0 or 3.3 V, 1 Mbit 128 Kbit x 8 TIMEKEEPER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, real-time clock, power-fail control circuit, battery, and crystal ■ BCD coded century, year, month, day, date,


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    m48t129ym48t129vstmicroelectronics PDF

    Contextual Info: M48Z128 M48Z128Y 5.0 V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of


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    m48z128m48z128y PDF

    Contextual Info: M48T129Y M48T129V 5.0 or 3.3 V, 1 Mbit 128 Kbit x 8 TIMEKEEPER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, real-time clock, power-fail control circuit, battery, and crystal ■ BCD coded century, year, month, day, date,


    Original
    m48t129ym48t129v PDF

    Contextual Info: M27W064 64 Mbit 4Mb x16 3V Supply FlexibleROM Memory NOT FOR NEW DESIGN FEATURES SUMMARY • ONE TIME PROGRAMMABLE ■ Figure 1. Packages SUPPLY VOLTAGE – VCC = 2.7 to 3.6V for Read – VPP = 11.4 to 12.6V for Program ■ ACCESS TIME ■ – 90ns at VCC = 3.0 to 3.6V


    Original
    m27w064110ns0020h888ah+1tsop48 PDF

    114-13056

    Contextual Info: 7 8 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT - RELEASED FOR PUBLICATION 6 5 4 3 2 - LOC - ALL RIGHTS RESERVED. - 1 REVISIONS DIST - P LTR F DESCRIPTION DATE REV PER ECO 14-003443 DWN APVD CT 3-21-14 DH 28.68 4.9 D D HOUSING 7.2 REF 18.6 14.4 16.1 REF -Z- CONTACT


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    08nov200218nov2002114-13056 PDF

    A0-A21

    Abstract: M27W064
    Contextual Info: M27W064 64 Mbit 4Mb x16 3V Supply FlexibleROM Memory PRELIMINARY DATA FEATURES SUMMARY • ONE TIME PROGRAMMABLE ■ Figure 1. Packages SUPPLY VOLTAGE – VCC = 2.7 to 3.6V for Read – VPP = 11.4 to 12.6V for Program ■ ACCESS TIME ■ – 90ns at VCC = 3.0 to 3.6V


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    m27w064110ns0020htsop48+2888aha0-a21 PDF

    Contextual Info: 2 THI S DRAWI NG I S U NP U B L I S HE D. R E L E A S E D FOR P U B L I C A T I O N BY TYCO E L E C T R O N I C S CORPORATI ON. ALL C OP YRI GHT 20 20 LOC GP R 1GHTS R ES ERVE D. REV 1 S I O N S DIST 00 p LTR DESCRIPTION REV PER E C O - 0 8 - 0 2 4 5 8 5 B


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    020ct200876jjm PDF

    M48Z128

    Abstract: M48Z128V M48Z128Y AN1012
    Contextual Info: M48Z128 M48Z128Y, M48Z128V 5.0 V or 3.3 V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of


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    m48z128m48z128ym48z128vpmdip32+1an1012 PDF