P40NF10
Abstract: JESD97 STP40NF10 p40nf
Contextual Info: STP40NF10 N-channel 100V - 0.025Ω - 50A TO-220 Low gate charge STripFET II Power MOSFET General features Type VDSS RDS on ID STP40NF10 100V <0.028Ω 50A • Exceptional dv/dt capability ■ Low gate charge at 100°C 3 ■ Application oriented characterization
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stp40nf10o-220p40nf10jesd97+1p40nf
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demultiplexer truth table
Abstract: 74VHCT139A 74VHCT139AMTR 74VHCT139ATTR TSSOP16
Contextual Info: 74VHCT139A DUAL 2 TO 4 DECODER/DEMULTIPLEXER • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
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74vhct139ademultiplexer truth table74vhct139amtr74vhct139attr+1tssop16
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74VHCT374A
Abstract: 74VHCT374AMTR 74VHCT374ATTR
Contextual Info: 74VHCT374A OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUTS NON INVERTING • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 180 MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX)
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Contextual Info: 74VHCT573A OCTAL D-TYPE LATCH WITH 3 STATE OUTPUTS NON INVERTING • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.4 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX)
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Contextual Info: 74VHCT374A OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUTS NON INVERTING • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 180 MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX)
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74vhct374a74vhct374amtr74vhct374attr |
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P80NF10
Abstract: P80NF b80nf1 b80nf10 P80NF-10
Contextual Info: STB80NF10 STP80NF10 N-channel 100V - 0.012Ω - 80A - TO-220 / D2PAK Low gate charge STripFET II Power MOSFET General features Type VDSS RDS on ID(1) STP80NF10 100V <0.015Ω 80A STB80NF10 100V <0.015Ω 80A • Exceptional dv/dt capability ■ 100% Avalanche tested
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stb80nf10stp80nf10o-220p80nf10+4p80nfb80nf1b80nf10p80nf-10
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p40nf10
Contextual Info: STP40NF10 N-channel 100V - 0.025Ω - 50A TO-220 Low gate charge STripFET II Power MOSFET General features Type VDSS RDS on ID STP40NF10 100V <0.028Ω 50A • Exceptional dv/dt capability ■ Low gate charge at 100°C 3 ■ Application oriented characterization
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stp40nf10o-220p40nf10 |
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74VHCT174A
Abstract: 74VHCT174AMTR 74VHCT174ATTR TSSOP16
Contextual Info: 74VHCT174A HEX D-TYPE FLIP FLOP WITH CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 150 MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
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74vhct174a74vhct174amtr74vhct174attrtssop16 |
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74VHCT00A
Abstract: 74VHCT132A 74VHCT132AMTR 74VHCT132ATTR TSSOP14
Contextual Info: 74VHCT132A QUAD 2-INPUT SCHMITT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 6.5 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C TYPICAL HYSTERESIS: 0.7V at VCC = 4.5V POWER DOWN PROTECTION ON INPUTS & OUTPUTS
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74vhct132a74vhct00a74vhct132amtr74vhct132attr+1tssop14
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74VHCT126A
Abstract: 74VHCT126AMTR 74VHCT126ATTR TSSOP14
Contextual Info: 74VHCT126A QUAD BUS BUFFERS 3-STATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
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74vhct126a74vhct126amtr74vhct126attrtssop14 |
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74VHCT574A
Abstract: 74VHCT574AMTR 74VHCT574ATTR
Contextual Info: 74VHCT574A OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUTS NON INVERTING • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 180 MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX)
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74VHCT08A
Abstract: 74VHCT08AMTR 74VHCT08ATTR TSSOP14
Contextual Info: 74VHCT08A QUAD 2-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.7 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
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74VHCT238A
Abstract: 74VHCT238AMTR 74VHCT238ATTR TSSOP16
Contextual Info: 74VHCT238A 3 TO 8 LINE DECODER • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
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74vhct238a74vhct238amtr74vhct238attrtssop16 |
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74VHCT273A
Abstract: 74VHCT273AMTR 74VHCT273ATTR
Contextual Info: 74VHCT273A OCTAL D-TYPE FLIP FLOP WITH CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 170 MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
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ld1083
Abstract: P1755
Contextual Info: KD1083 7.5A LOW DROP POSITIVE VOLTAGE REGULATOR ADJUSTABLE AND FIXED • ■ ■ THREE TERMINAL ADJUSTABLE OR FIXED OUTPUT VOLTAGE 1.5V,1.8V, 2.5V, 3.0, 3.3V OUTPUT CURRENT UP TO 7.5A 1.4V MAX DROPOUT VOLTAGE AT FULL LOAD LINE REGULATION: MAX 0.2% OVER FULL
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ld1083
Abstract: KD1083 KD1083D2T15 KD1083D2T18 KD1083V KD1083V15 KD1083V18 KD1083V25 KD1083V30 KD1083V33
Contextual Info: KD1083 7.5A LOW DROP POSITIVE VOLTAGE REGULATOR ADJUSTABLE AND FIXED • ■ ■ ■ ■ ■ ■ ■ ■ THREE TERMINAL ADJUSTABLE OR FIXED OUTPUT VOLTAGE 1.5V,1.8V, 2.5V, 3.0, 3.3V OUTPUT CURRENT UP TO 7.5A 1.4V MAX DROPOUT VOLTAGE AT FULL LOAD LINE REGULATION: MAX 0.2% OVER FULL
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kd1083ld1083kd1083d2t15kd1083d2t18+6kd1083vkd1083v15kd1083v18kd1083v25kd1083v30kd1083v33
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74VHCT00A
Abstract: 74VHCT00AMTR 74VHCT00ATTR TSSOP14 truth table NAND gate 74
Contextual Info: 74VHCT00A QUAD 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
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74vhct00a74vhct00amtr74vhct00attrtssop14+1truth table nand gate 74
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74VHCT86A
Abstract: 74VHCT86AMTR 74VHCT86ATTR TSSOP14
Contextual Info: 74VHCT86A QUAD EXCLUSIVE OR GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.5ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
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74VHCT03A
Abstract: 74VHCT03AMTR 74VHCT03ATTR TSSOP14
Contextual Info: 74VHCT03A QUAD 2-INPUT OPEN DRAIN NAND GATE • ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPZ = 3.9 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
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P40NF10
Abstract: STP40NF10 d1 marking code dpak transistor p40nf S2180
Contextual Info: STP40NF10 N-channel 100 V, 0.025 Ω, 50 A TO-220 low gate charge STripFET II Power MOSFET Features Order code VDSS RDS on max. ID STP40NF10 100 V < 0.028 Ω 50 A • Exceptional dv/dt capability ■ Low gate charge ■ 100% avalanche tested 3 1 2 TO-220
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stp40nf10o-220p40nf10d1 marking code dpak transistor+2p40nfs2180
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74VHCT573A
Abstract: 74VHCT573AMTR 74VHCT573ATTR
Contextual Info: 74VHCT573A OCTAL D-TYPE LATCH WITH 3 STATE OUTPUTS NON INVERTING • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.4 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX)
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74VHCT27AMTR
Abstract: 74VHCT27ATTR TSSOP14 74VHCT27A
Contextual Info: 74VHCT27A TRIPLE 3-INPUT NOR GATE • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5 ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
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Contextual Info: 74VHCT02A QUAD 2-INPUT NOR GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5ns TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
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74VHCT74A
Contextual Info: 74VHCT74A DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ HIGH SPEED: fMAX = 160 MHz TYP. at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN.), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS
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