15JAN2010 Search Results

Contextual Info: CDCE949 CDCEL949 www.ti.com SCAS844D – AUGUST 2007 – REVISED MARCH 2010 Programmable 4-PLL VCXO Clock Synthesizer with 1.8V, 2.5V and 3.3V LVCMOS Outputs Check for Samples: CDCE949, CDCEL949 FEATURES • 1 • Member of Programmable Clock Generator Family

Contextual Info: THIS DRAWING IS A CONTROLLED DOCUMENT. REVISIONS DIST HJ - P LTR DESCRIPTION E F F1 F2 New Coplanarity, Solder Pad Layout Printing REVISED PER ECO-11-005150 REVISED PER ECO-11-017072 ECR-13-009645 14JUN2013 A 0.9+0.3 3 3 2006 4° 4° 4.9 Coplanarity<=0.10mm

6502 MCU

Abstract: STM65xx STM6502 STM6503 STM6504 STM6505 STM6503VEAADG6F STM MARKING DIAGRAMS
Contextual Info: STM6502, STM6503 STM6504, STM6505 Dual push-button Smart ResetTM with user-adjustable setup delays Features • Dual Smart Reset push-button inputs with extended reset setup delay ■ Adjustable Smart Reset™ setup delay tSRC : by external capacitor or three-state logic

PAL16L8

Abstract: TIBPAL16L8-5C TIBPAL16L8-7M TIBPAL16R4-5C TIBPAL16R4-7M TIBPAL16R6-5C TIBPAL16R6-7M TIBPAL16R8-5C TIBPAL16R8-7M
Contextual Info: TIBPAL16L8-5C, TIBPAL16R4-5C, TIBPAL16R6-5C, TIBPAL16R8-5C TIBPAL16L8-7M, TIBPAL16R4-7M, TIBPAL16R6-7M, TIBPAL16R8-7M HIGH-PERFORMANCE IMPACT-X  PAL CIRCUITS SRPS011D – D3359, OCTOBER 1989 – REVISED SEPTEMBER 1992 • • • • TIBPAL16L8’ C SUFFIX . . . J OR N PACKAGE

Contextual Info: CDCE937 CDCEL937 www.ti.com SLAS564F – AUGUST 2007 – REVISED MARCH 2010 Programmable 3-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V and 3.3-V LVCMOS Outputs Check for Samples: CDCE937, CDCEL937 FEATURES • • 1 • Member of Programmable Clock Generator

GW50HF60SD

Abstract: ST IGBT code marking STGW50HF60SD FIGURE15
Contextual Info: STGW50HF60SD 60 A, 600 V, very low drop IGBT with soft and fast recovery diode Features • Very low on-state voltage drop ■ Low switching off ■ High current capability ■ Very soft ultra fast recovery antiparallel diode Application ■ PV inverter ■

4946

Abstract: 4946 mosfet 4946 si L6571 L6571B L6571A irf 480
Contextual Info: L6571 High voltage half bridge driver with oscillator Features • High voltage rail up to 600 V ■ BCD off line technology ■ 15.6 V Zener clamp on Vs ■ Driver current capability: – Sink current = 270 mA – Source current = 170 mA DIP-8 SO8 can be programmed using external resistor and

CDCE949

Abstract: CDCEL949 TSSOP24
Contextual Info: CDCE949 CDCEL949 www.ti.com SCAS844D – AUGUST 2007 – REVISED MARCH 2010 Programmable 4-PLL VCXO Clock Synthesizer with 1.8V, 2.5V and 3.3V LVCMOS Outputs Check for Samples: CDCE949, CDCEL949 FEATURES • 1 • Member of Programmable Clock Generator Family

CDCE937

Abstract: CDCEL937 TSSOP24 frequency divider block diagram
Contextual Info: CDCE937 CDCEL937 www.ti.com SLAS564F – AUGUST 2007 – REVISED MARCH 2010 Programmable 3-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V and 3.3-V LVCMOS Outputs Check for Samples: CDCE937, CDCEL937 FEATURES • • 1 • Member of Programmable Clock Generator

CDCE913

Abstract: CDCEL913 TSSOP14
Contextual Info: CDCE913 CDCEL913 www.ti.com SCAS849E – JUNE 2007 – REVISED MARCH 2010 Programmable 1-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V Outputs Check for Samples: CDCE913, CDCEL913 FEATURES 1 • Member of Programmable Clock Generator Family – CDCE913/CDCEL913: 1-PLL, 3 Outputs

Contextual Info: Critical Link, LLC www.CriticalLink.com www.MityDSP.com MityDSP MityDSP-L138F Processor Card 13-AUG-2012 FEATURES • TI OMAP-L138 Dual Core Application Processor - 456 MHz Max C674x VLIW DSP Floating Point DSP 32 KB L1 Program Cache 32 KB L1 Data Cache

STH270N4F3-6

Abstract: sth270n4f3 270N4F3
Contextual Info: STH270N4F3-6 N-channel 40 V, 1.40 mΩ, 180 A, H2PAK STripFET III Power MOSFET Features Type VDSS RDS on ID (1) STH270N4F3-6 40 V < 1.7 mΩ 180 A TAB 1. Current limited by package • Conduction losses reduced ■ Low profile, very low parasitic inductance, high

STMPE821

Abstract: AN2802 capacitive touch controller IC BLOCK DIAGRAM OF TOUCH PLATE water level sensor schematic diagram touch screen controller for mobile phone AN2734 Capacitive PCB capacitive touch sensor pcb guideline Capacitive layout
Contextual Info: AN2734 Application note S-Touch design procedure Introduction The purpose of this application note is to provide the system/hardware engineers enough ground knowledge to start the design of capacitive touch inferface solutions with the S-Touch™ capacitive controller devices.

AD27

Abstract: AD30 XIO2001
Contextual Info: XIO2001 XIO2001 PCI Express to PCI Bus Translation Bridge Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not

Contextual Info: CDCE949 CDCEL949 www.ti.com SCAS844D – AUGUST 2007 – REVISED MARCH 2010 Programmable 4-PLL VCXO Clock Synthesizer with 1.8V, 2.5V and 3.3V LVCMOS Outputs Check for Samples: CDCE949, CDCEL949 FEATURES • 1 • Member of Programmable Clock Generator Family

tdfn-8l

Abstract: STM MARKING DIAGRAMS AM00329 STM6505RCABDG6F
Contextual Info: STM6502, STM6503 STM6504, STM6505 Dual push-button smart reset Features • Operating voltage 1.0 V active-low output valid to 5.5 V ■ Low supply current ■ Factory-programmable thresholds to monitor VCC in the range of 1.575 to 4.625 V typ. ■ Open-drain, active-low reset output

Contextual Info: CDCE949 CDCEL949 www.ti.com SCAS844D – AUGUST 2007 – REVISED MARCH 2010 Programmable 4-PLL VCXO Clock Synthesizer with 1.8V, 2.5V and 3.3V LVCMOS Outputs Check for Samples: CDCE949, CDCEL949 FEATURES • 1 • Member of Programmable Clock Generator Family

Contextual Info: THIS DRAWING IS A CONTROLLED DOCUMENT. REVISIONS DIST HJ - P LTR DESCRIPTION E F F1 F2 New Coplanarity, Solder Pad Layout Printing REVISED PER ECO-11-005150 REVISED PER ECO-13-009645 18JUN2013 3 4° 0.9+0.3 A 2006 4° 3 4.9 Coplanarity<=0.10mm 6.7 16+0.5 -0.5

conclusion touch switch

Abstract: AN2802 capacitive touch sensor pcb guideline Capacitive touch touch switch STMPE821 touch switch on off AN2805 Automotive Proximity and Touch Sensor capacitive touch panel pin out
Contextual Info: AN2802 Application note A programming guide for the touch module in capacitive S-Touch devices Introduction The new emerging technology of touch sensing enables low cost, robust, flexible and intuitive user interface without compromising on the existing performance and form factor

Contextual Info: RF Signal Relays AXICOM Telecom-, Signal and RF Relays Sep. 07, Rev. B HF6 HF6 Relay Relay Terminal assignment n Y-Design Relay top viewDC n Frequency range n Impedance to 6GHz 50Ω n Small dimensionstype, 16x7.6x10mm Non-latching n 1 form C contact (1condition

Contextual Info: CDCE937 CDCEL937 www.ti.com SLAS564F – AUGUST 2007 – REVISED MARCH 2010 Programmable 3-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V and 3.3-V LVCMOS Outputs Check for Samples: CDCE937, CDCEL937 FEATURES • • 1 • Member of Programmable Clock Generator

STM6502

Abstract: STM6503 STM6503SEAADG6F
Contextual Info: STM6502, STM6503 STM6504, STM6505 Dual push-button Smart ResetTM with user-adjustable setup delays Features • Dual Smart Reset push-button inputs with extended reset setup delay ■ Adjustable Smart Reset setup delay tSRC : by external capacitor or three-state logic

Contextual Info: THIS DRAWING IS A CONTROLLED DOCUMENT. REVISIONS DIST HJ - P LTR DESCRIPTION E F F1 F2 New Coplanarity, Solder Pad Layout Printing REVISED PER ECO-11-005150 REVISED PER ECO-11-017072 ECR-13-009645 7.5+0.1 -0.1 3 4° 4° 3 2006 14JUN2013 6.7 16+0.5 -0.5 RELEASED FOR PUBLICATION

Contextual Info: CDCE913 CDCEL913 www.ti.com SCAS849E – JUNE 2007 – REVISED MARCH 2010 Programmable 1-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V Outputs Check for Samples: CDCE913, CDCEL913 FEATURES 1 • Member of Programmable Clock Generator Family – CDCE913/CDCEL913: 1-PLL, 3 Outputs