14660 Search Results

Contextual Info: flöD D • ä23Sfe.05 QDlMbbD S H S I E 6 88D 14660 D "/ // BUZ 53 C SIEMENS A K T I E N û E S E L L S C H A F -Main ratings N-Channel a 1000 V Draln-source voltage Vaa = 2,3 A Continuous drain current Io Draln-source on-reslstance ^ D S o n ■ en

Contextual Info: Doc No. TT4-EA-14660 Revision. 1 Product Standards Schottky Barrier Diode DB3Y501KEL DB3Y501KEL Silicon epitaxial planar type Unit : mm For high speed switching circuits DB3X501K in NMini3 type package 2.9 0.4 0.13 • Features 3 1.4 2.4  Short reverse recovery time trr

C67078-A1009-A5

Contextual Info: öfl» D • *_:- r — :- - f i I- 1- —- - - û23St.0S QDlMbbD S » S I E G 88D 14660 "i / D BUZ 53 C _ SIEMENS A K T I E N G E S E L L S C H A F -Main ratings

U2761B

Contextual Info: U2761B DECT RF / IF IC Description The U2761B is an integrated circuit manufactured in Atmel Wireless & Microcontrollers’ UHF5S technology, designed for DECT application. It contains rejection mixer, IF amplifier, FM demodulator working at f = fIF/2, baseband filter, RSSI, TX preamplifier and power-ramping generator for power amplifier.

ST8624

Abstract: 480X240 ST8600 Y239 Y240 D7261 Y122 Y175 42832
Contextual Info: ST Sitronix ST8624 240 Segment Driver for STN LCD with Low-Voltage Drive PRELIMINARY Notice: This is not a final specification. Some parameters are subject to change 1 Features „ Duty cycle up to 1/300 „ Shadowing correction circuit „ LCD drive voltage: 3.5 to 5.5 V

Contextual Info: VN5T006ASP-E Single-channel high-side driver with analog current sense for 24 V automotive applications Datasheet − production data Features Max transient supply voltage VCC 58 V Operating voltage range VCC 8 V to 36 V Typ on-state resistance RON 6 mΩ Current limitation typ

Contextual Info: MC100EP196B 3.3 V ECL Programmable Delay Chip With FTUNE Descriptions The MC100EP196B is a Programmable Delay Chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar

Contextual Info: MC100EP195B 3.3V ECL Programmable Delay Chip Descriptions The MC100EP195B is a Programmable Delay Chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and

sn76131

Abstract: tlo72cp TOSHIBA 2N3055 M53207P 2N3055 TOSHIBA KIA7313AP kia7640ap LA5530 M5L8155P TBB1458B
Contextual Info: ACTIVE ELECTRONICS COMPONENTS CROSS REFERENCE GUIDE 2SC429GTM 2SC458 2SC458LG 2SC503 2SC504 2SC510 2SC512 2SC519 2SC520A 2SC594 2SC699A 2SC780 2SC809-1 2SC945 2SC3012 2SC3074 2SC3114 2SC3115 2SC3116 2SC3117 2SC3134 2SC3135 2SC3138 2SC3143 2SC3144 2SC3145 2SC3157

3512 h45

Contextual Info: SLWS133A GC4016 MULTI-STANDARD QUAD DDC CHIP DATA SHEET REV 1.0 August 27, 2001 Graychip reserves the right to make changes in circuit design and/or specifications at any time without notice. The user is cautioned to verify that datasheets are current before placing orders.

D4457N

Abstract: 22202 d4457n m3.2 9373 9398-4 D2228N D5807N D798N D8019N 2u 45 diode
Contextual Info: M3.2U - Schaltung Anschlußspannung Bemessungs-Gleichspannung Sperrspannung Bauelement n. VDE 0558 VRRM ~ 60 Veff 35 V 200 V ~ ~ ~ ~ ~ + Kühlblöcke für Wasserkühlung mit offener Isolation Temp. tA [°C] M3_2v11 Satzstrom Id [A] Verlustl. Pd Wasserm. vL

MG240V1US41

Abstract: DIODE i2t
Contextual Info: TOSHIBA INSULATED GATE BIPOLAR TRANSISTOR MG240V1US41 GTR Module Unit in mm Silicon N Channel IGBT High Power Switching Applications Motor Control Applications Features • High input impedance • High speed: tf = 1.5µs Max. (IC = 240A) trr = 0.6µs (Max.) (IF = 240A)

MC14XXXBCP

Contextual Info: M O T O R O L A S C { L O G I C } Ifl ; 6367252 MOTOROLA SC DE|t.3b 72S 2 0071054 D | L O G IC 98D 79854 D MC14559B See Page 6-394 M O T O R O L A MC14560B NBCD ADDER CM O S MSI The MC14560B adds two 4-bit numbers in NBCD (natural binary coded decimal) form at, resulting in sum and carry outputs in NBCD

Contextual Info: MC10EP196, MC100EP196 Product Preview 3.3V/5VĄECL Programmable Delay Chip with FTUNE The MC10/100EP196 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It is identical to the

SKIIP 33 nec 125 t2

Abstract: skiip 613 gb 123 ct RBS 6302 ericsson SKIIP 513 gb 173 ct THERMISTOR ml TDK 150M pioneer PAL 010a Project Report of smoke alarm using IC 555 doc SKiip 83 EC 125 T1 ericsson RBS 6000 series INSTALLATION MANUAL Ericsson Installation guide for RBS 6302
Contextual Info: Discontinued and Superseded Stock Number History. This document contains Discontinued and Superseded Stock Number History. The information is listed in the following format: Stock Number: The original RS Stock Number of the item. Brief Description: The Invoice Description of the item.

Contextual Info: MC10EP195, MC100EP195 3.3V / 5VĄECL Programmable Delay Chip The MC10/100EP195 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and

VCF12

Abstract: LQFP-32 MC100 QFN32 QFN-32
Contextual Info: MC100EP196B 3.3 V ECL Programmable Delay Chip With FTUNE Descriptions The MC100EP196B is a Programmable Delay Chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar

TQFP 100 socket

Contextual Info: MC10EP196, MC100EP196 Product Preview 3.3V/5VĄECL Programmable Delay Chip with FTUNE The MC10/100EP196 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It is identical to the

sony ps3 eye camera

Abstract: 6d40 engine diagram sgx530* vector graphics manual dsi CVBS BTA 16 6008 PowerVR SGX series 5 "cmos camera "mc 7258 wiring diagram ccd camera mc 7218 wiring diagram ET 439 power module fuji
Contextual Info: Public Version AR Y OMAP OMAP34xx Multimedia Device Silicon Revision 3.1, 3.1.1 Texas Instruments OMAP™ Family of Products EL IM IN Version R PR Technical Reference Manual Literature Number: SWPU114R July 2007 – Revised April 2009 Public Version www.ti.com

MN56020

Abstract: QFP40 MN56030 mn53000 S8480 QFP-40 mn5504 N530 I/MN56050
Contextual Info: • CMOS Gate Arrays •S eries Lineup Delay Time * Series Features Low gate, Few pin package MN53000 1.4ns V d d “ 5V MN55000 Fixed ROM/RAM built-in (RAM 2Kbit, 4Kbit) MN56000 Standard channel type gate array Sea-of-gate, Optional bit, Word RAM/ROM possible, RAM 16Kbit max., ROM 64Kbit max.

MC100EP195

Abstract: QFN-32 footprint MC10EP195 QFN32 7850 AE
Contextual Info: MC10EP195, MC100EP195 3.3V ECL Programmable Delay Chip The MC10/100EP195 is a Programmable Delay Chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. http://onsemi.com

MC100EP195

Abstract: MC100EP195FA MC100EP195FAR2 MC10EP195 MC10EP195FA MC10EP195FAR2
Contextual Info: MC10EP195, MC100EP195 3.3V / 5VĄECL Programmable Delay Chip The MC10/100EP195 is a programmable delay chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The delay section consists of a programmable matrix of gates and

ic 4440 circuit diagram

Abstract: pin diagram of ic 4440 QFN-32 footprint MC100 QFN32 LQFP-32 footprint
Contextual Info: MC100EP196B 3.3 V ECL Programmable Delay Chip With FTUNE Descriptions The MC100EP196B is a Programmable Delay Chip PDC designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. It has similar

din 5901 rails

Abstract: MCMurdo 801 DPAF GASKET s1854 microdot 10-32 female connector ZDB25P1AKN SS-60300-010 IEC-1076-4-101 DB-25S-A191 RJ11 6p4c
Contextual Info: 1797 Technical portal and online community for Design Engineers - www.element-14.com Connectors - Signal & Data Page 1875 1829 1856 1843 1854 1877 1827 1825 1811 1805 1798 1821 1821 1826 1812 1814 1801 1817 1802 1817 1810 1803 1819 1804 1797 1811 DIN41612 Class 1, 2 and 3 . . . . . . . . . . . . . . . . . .