14 PIN IC DIP PACKAGE Search Results

TP060

Abstract: TP0606N7
Contextual Info: TP0606N6 TP0606N7 Low Threshold P-Channel Enhancement-Mode Vertical DMOS FET Quad Array Ordering Information b v dss/ ^DS ON b v dgs (max) -60V 3.5Q Order Number / Package 14-Pin P-Dip 14-Pin C-Dip* TP0606N6 TP0606N7 * 14 pin side brazed ceram ic DIP Advanced DMOS Technology

VC0106

Contextual Info: ^ Supertex inc. VC0106N6 VC0106N7 Complementary Enhancement-Mode Vertical DMOS FET Quad Array Ordering Information Order Number / Package BVdss 1 BVdgs ^□s on (max) Q1 + Q2 or Q3 + Q4 14-Pin P-Dip 14-Pin C-Dip* 60V 11 £2 VC0106N6 VC0106N7 * 14-pin Side Brazed Ceram ic Dip.

VQ1000

Abstract: vq1000n6
Contextual Info: VQ1000 N-Channel Enhancement-Mode Vertical DMOS FET Quad Array Ordering Inform ation BV dss / Order Num ber / Package b v dgs ^DS ON (max) ^D(ON) (min) 14-Pin P-DIP 14-Pin C-DIP* 60V 5.5Q 0.5A VQ1000N6 VQ1000N7 * 14 pin side brazed ceram ic DIP Advanced DMOS Technology

Contextual Info: Stamp Specifications revised 02/10 Released Products Rev.Dx / BS1-IC BS2-IC BS2e-IC BS2sx-IC Package PCB w/Proto / 14-pin SIP 24-pin DIP 24-pin DIP Package Size (L x W x H) 2.5" x 1.5" x .5" / 1.4" x .6" x .1" 1.2" x 0.6" x 0.4" 1.2" x 0.6" x 0.4" 24-pin DIP

VN0106N7

Contextual Info: — VN0104N6/VN0104N7 VN0106N6/VN0106N7 N-Channel Enhancement-Mode Vertical DMOS FET Quad Array Ordering Information b v dss/ R d S ON Order Number / Package BVdgs (max) 14-Pin P-Dip 14-Pin C-Dip* 40V 3Q VN0104N6 VN0104N7 60V 3Q VN0106N6 VN0106N7 * 14-pin Side Brazed C eram ic Dip.

Contextual Info: 10 Pin to 14 Pin DIP Adapters ACCUTEK MICROCIRCUIT CORPORATION DIP ADAPTER MODULES ELIMINATE THE NEED TO REDESIGN MOTHERBOARDS OR MAY BE USED FOR BREADBOARD PROTOTYPING DESCRIPTION This new family of Accutek DIP Adapter Modules converts surface mount IC’s to pin compatible DIP packages for creating drop-in replacements for end-of-life DIP IC’s. Package types supported are:

TN0606N7

Contextual Info: ^ Supertex inc. TN0606N6 TN0606N7 Low Threshold N-Channel Enhancement-Mode Vertical DMOS FET Quad Array Ordering Information Order Number / Package b v dss/ BVdos max 14-Pin P-Dip 14-Pin C-Dip* 60V 1.5£i TN0606N6 TN0606N7 * 14 pin side b ra z e d ceram ic D IP

JR 3610

Abstract: 01ft 4414 so8
Contextual Info: TELEDYNE COMPONENTS 5ÛE D • ûTlrTbQà QGQti3E7 3 CDG4500 SE M IC O N D U C T O R 4-CHANNEL CMOS/D-MOS HIGH-FREQUENCY MULTIPLEXER ORDERING INFORMATION 4'Channel Multiplexer with Enable 14-Pin Plastic DIP 14-Pin Ceramic DIP Commercial Temp. Range CDG4S0QCJ

IC MM 5649

Abstract: MM 5649 4386 QQ-P-35
Contextual Info: Pomona DIP Clips® for 8-14-16-20-24-40 Pin Clips And 8 Through 40 Pin DIP Removers Pomona DIP Clip® test clips are designed for testing dual-in-line IC packages on PC boards. These devices incorporate many built-in features that assure a positive electrical connection as well as hands free

Contextual Info: VQ2006 P-Channel Enhancement-Mode Vertical DMOS FET Quad Array Ordering Inform ation Order Number / Package BVdss / ^D S O N b v dgs (max) (min) Quad Ceramic DIP* -90V 5.0Q -1.0A VQ2006P ^D(ON) * 14-pin side-brazed ceram ic DIP. Advanced DMOS Technology

Contextual Info: VQ1004 N-Channel Enhancement-Mode Vertical DMOS FET Quad Array Ordering Information Order Number / Package b v dss/ ^DS ON b v dgs (max) (min) Quad Ceramic DIP* 60V 3.5Q 1.5A V Q 10 04P I d (ON) Quad Plastic DIP V Q 10 04J * 14 pin side brazed ceram ic DIP

sis 962

Contextual Info: VQ1004 Supertex inc. N-Channel Enhancement-Mode Vertical DMOS FET Quad Array Ordering Information BVdss/ BV ogs 60V Order Number / Package •D ON n DS(ON) (max) 3.5Q (min) Quad Ceramic DIP* 1.5A VQ1004P Quad Plastic DIP VQ1004J * 14 pin side b ra zed ceram ic D IP

Contextual Info: VQ1001 N-Channel Enhancement-Mode Vertical DMOS FET Quad Array Ordering Information Order Number / Package b v dss/ ^D S O N b v dgs (max) (min) Quad Ceramic DIP* 30V 1.0Q 2.0A VQ1001P ^D(ON) * 14 pin side brazed ceram ic DIP Advanced DMOS Technology High Reliability Devices

DS10 diode

Abstract: diode DS10
Contextual Info: VQ2001 inc. P-Channel Enhancement-Mode Vertical DMOS FET Quad Array Ordering Information Order Number / Package B V DSS/ R b v dgs max (min) Quad Ceramic DIP* -30V 2.0ÌÌ -1.5A VQ2001P '□(ON) d S(ON) * 14-pin side-brazed ceram ic DIP. Advanced DMOS Technology

Contextual Info: ^ VQ2001 ~j r /r S i 11 r ' zJ r r , P-Channel Enhancement-Mode Vertical DMOS FET Quad Array Ordering Inform ation b v dss / BVdgs max Id(ON) (min) -30V 2.0Q -1.5A ^DS(ON) Order Number / Package Quad Ceramic DIP* VQ2001P * 14-pin side-brazed ceram ic DIP.

Contextual Info: surface mount t 2l CO M PATIBLE Wee DIP M U LTI-LO G IC J DELAY LINE # T2 L FAST input and outputs # Delays stable and precise # SO-14 pin pattern # Wee DIP package .235 high # Available in delays from 5 to 250ns — each isolated and with 10 T2L fan-out capacity

Contextual Info: A N A LO G D E V IC E S □ FEATU R ES LC2M0S pP-Compatible 14-Bit DAC AD7538 FUNCTIONAL BLOCK DIAGRAM All Grades 14-Bit Monotonic over the Full Temperature Range Low Cost 14-Bit Upgrade for 12-Bit Systems 14-Bit Parallel Load with Double Buffered Inputs Small 24-Pin, 0.3" DIP and SOIC

1L6 pnp

Abstract: NSQ2221 NSQ2222 NSQ2369 NSQ2484 NSQ2906 NSQ2907 NSQ3467 NSQ3798 NSQ3799
Contextual Info: NEW ENGLAND SEMICONDUCTOR SMALL SIGNAL PNP TRANSISTOR TO-116 PACKAGE TO-116 14 PIN CERAMIC DIP TO-116 TO-116 DEVICE TYPE ^CEO Ic sus (max) VOLTS AMPS @ IC/ VCE min/max @ mA/V V @ mA/mA @ IC/IB C<P P (MHz) 1*RE Ît 2N6987A 60 .6 100/300@150/10 0.4@150/15

ADL-050SH

Abstract: ADL-100S adl-060sh ADL-150S ADL250SH ADL-250SH adl12
Contextual Info: ACTIVE DELAY LINES DIP 14-PIN TYPE Built-in TTL, total delay time:20 to 250ns ADL series FEATURES • Waveform shaping circuits are not required for the built-in TTL IC. • Integration into a dual-inline package achieves a compact size only 5.08mm in height.

14 pin ic DIP PACKAGE

Abstract: NTE1476 NTE7000 16 Pin dip ic NTE825 NTE1399
Contextual Info: IC Pin 1 Indicator Chart DIP Package* Top View half circle 1 circle lowerleft corner bottom beveled edge 1 1 left-side beveled edge 1 Examples: NTE825 14 Lead , NTE7000 (16 Lead) SIP Package* Front View half circle 1 circle lowerleft corner 1 bottom beveled edge

MPC16S

Abstract: SHC80KP mpc16
Contextual Info: SHC80 B U R R -B R O W N Fast 1C SAMPLE/HOLD AMPLIFIERS FEATURES • 14-PIN DIP PACKAGE • lOpsec ACQUISITION TIM E • C O M P LET E W ITH HOLDING CAPACITOR • ±0.01% ACCURACY DESCRIPTION — » Offset A d j. + 15 V0 C N /C Lo g ic Return Log ic S u p p ly

hp6652a

Abstract: daewon DC100N TCXO dip 14 HP53131A HP665 MAS9270
Contextual Info: DC100N: COMPENSATION AND PROGRAMMING SYSTEM FOR MAS TCXOs Manufacturing system for producing digitally programmed, analog compensated TCXOs and VCTCXOs Features • Programming and testing of TCXOs and VCTCXOs • Suitable for MAS9270Cxxx Oscillator IC • 14 Pin DIP socket array programming and testing board for producing 4 x

Contextual Info: OAE, OAP Series E5 ECL and PECL Oscillator PART NUMBERING GUIDE C A L IB E R E L E C T R O N IC S IN C . specifications subject to change * revision 3-2003 Environmental/Mechanical Specifications on page F5 OAE 100 27 AA C - 30.000MHz Package OAE = 14 Pin Dip / ±5.2Vdc / ECL

fip4e8s

Abstract: uPC177C uPC277C upc1251c fip4a8s upc451c 24-hour rom 512x8 24HOUR PD2332C
Contextual Info: N E C E L E C T R O N I C S INC STC • i> b M 2 7 5 S S OOOfc.103 5 ■ E Integrated Circuits fMs E S E Ë h Æ ' • Linear IC s v+ Type N a [V] Vio [mV] MAX. [nA] MAX. lio InA] MAX. Ib Ic c 1mA] MAX. Response Time [ns] TYP. Package Function 14-pin DIP