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    3M Interconnect 7371-3MMX10M

    ACF 3.0MM X 10M 0.118"X33'
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    DigiKey 7371-3MMX10M Bulk
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    Pulse Electronics Corporation PE-53828NL

    Power Inductors - Leaded 168uH 20% 1.02A
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    TTI PE-53828NL Tray 2,270 5
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    Pulse Electronics Corporation P0848NL

    Power Inductors - SMD 260KHZ SWITCHER IND
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    TTI P0848NL Tray 515 5
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    Pulse Electronics Corporation P0849NL

    Power Inductors - SMD 260KHZ SWITCHER IND
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    TTI P0849NL Tray 385 55
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    Pulse Electronics Corporation PE-53829NL

    Power Inductors - Leaded SIMPLE SWITCHER INDUCTOR
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    TTI PE-53829NL Tray 282 3
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    13MMX1 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    K7R321884M-FC25

    Abstract: K7R321884M K7R321884M-FC16 K7R321884M-FC20 K7R323684M K7R323684M-FC16 K7R323684M-FC20 K7R323684M-FC25
    Contextual Info: K7R323684M K7R321884M 1Mx36 & 2Mx18 QDRTM II b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit QDR TM II b4 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. June 30, 2001 Advance 0.1 1. Package dimension modify. P.20 from 13mmx15mm to 15mmx17mm


    Original     		K7R323684M K7R321884M 1Mx36 2Mx18 1Mx36-bit, 2Mx18-bit 13mmx15mm 15mmx17mm -FC25 K7R321884M-FC25 K7R321884M K7R321884M-FC16 K7R321884M-FC20 K7R323684M K7R323684M-FC16 K7R323684M-FC20 K7R323684M-FC25 PDF

    K7N161801A

    Abstract: K7N163601A
    Contextual Info: K7N163601A K7N161801A 512Kx36 & 1Mx18 Pipelined NtRAM TM Document Title 512Kx36 & 1Mx18-Bit Pipelined NtRAMTM Revision History Rev. No. History Draft Date Initial document. Add JTAG Scan Order Add x32 org and industrial temperature . Add 165FBGA package Speed bin merge.


    Original     		K7N163601A K7N161801A 512Kx36 1Mx18 1Mx18-Bit 165FBGA K7N1636 K7N161801A K7N163601A PDF

    EM48AM3284LBA

    Abstract: EM48AM3284LBA-75F EM48AM3284LBA-75FE
    Contextual Info: eorex EM48AM3284LBA 512Mb 4Mx4Bank×32 Synchronous DRAM Features Description • Fully Synchronous to Positive Clock Edge • Single 1.8V +/- 0.1V Power Supply • LVCMOS Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8


    Original     		EM48AM3284LBA 512Mb EM48AM3284LBA EM48AM3284LBA-75F EM48AM3284LBA-75FE PDF

    NC-2H

    Abstract: K7B161825A K7B163225A K7B163625A
    Contextual Info: K7B163625A K7B163225A K7B161825A Preliminary 512Kx36/32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/x32 & 1Mx18-Bit Synchronous Burst SRAM Revision History Rev. No. 0.0 0.1 0.2 History 1. Initial draft 1. Add JTAG Scan Order 1. Add x32 org and industrial temperature .


    Original     		K7B163625A K7B163225A K7B161825A 512Kx36/32 1Mx18 512Kx36/x32 1Mx18-Bit 165FBGA NC-2H K7B161825A K7B163225A K7B163625A PDF

    K7N161801A

    Abstract: K7N163201A K7N163601A
    Contextual Info: K7N163601A K7N163201A K7N161801A Preliminary 512Kx36/32 & 1Mx18 Pipelined NtRAMTM Document Title 512Kx36/32 & 1Mx18-Bit Pipelined NtRAMTM Revision History Rev. No. 0.0 0.1 0.2 0.3 Draft Date History 1. Initial document. 1. Add JTAG Scan Order 1. Add x32 org and industrial temperature .


    Original     		K7N163601A K7N163201A K7N161801A 512Kx36/32 1Mx18 1Mx18-Bit 165FBGA K7N1636 K7N161801A K7N163201A K7N163601A PDF

    Contextual Info: K7I163684B K7I161884B 512Kx36 & 1Mx18 DDRII CIO b4 SRAM 18Mb DDRII SRAM Specification 165FBGA with Pb & Pb-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,


    Original     		K7I163684B K7I161884B 512Kx36 1Mx18 165FBGA 11x15 PDF

    Contextual Info: K7N163645A K7N163245A K7N161845A 512Kx36/32 & 1Mx18 Pipelined NtRAMTM Document Title 512Kx36/32 & 1Mx18-Bit Pipelined NtRAM TM Revision History History Draft Date Remark 1. Initial document. 1. Add JTAG Scan Order 1. Add x32 org and industrial temperature .


    Original     		K7N163645A K7N163245A K7N161845A 512Kx36/32 1Mx18 1Mx18-Bit 165FBGA K7N1636 PDF

    Contextual Info: IS61DDP2B22M18A IS61DDP2B21M36A 2Mx18, 1Mx36 36Mb DDR-IIP Burst 2 CIO Synchronous SRAM (2.0 Cycle Read Latency) FEATURES •                   1Mx36 and 2Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid


    Original     		IS61DDP2B22M18A IS61DDP2B21M36A 2Mx18, 1Mx36 2Mx18 400MHz 333MHz 300MHz PDF

    Contextual Info: IS61QDP2B41M18A IS61QDP2B451236A 1Mx18 , 512Kx36 18Mb QUAD-P Burst 4 SYNCHRONOUS SRAM (2.0 Cycle Read Latency) FEATURES •                    512Kx36 and 1Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid


    Original     		IS61QDP2B41M18A IS61QDP2B451236A 1Mx18 512Kx36 1Mx18 400MHz 333MHz 300MHz PDF

    Contextual Info: IS61QDB41M18A IS61QDB451236A 1Mx18, 512Kx36 18Mb QUAD Burst 4 SYNCHRONOUS SRAM FEATURES •                   512Kx36 and 1Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid


    Original     		IS61QDB41M18A IS61QDB451236A 1Mx18, 512Kx36 1Mx18 IS61QDB451236A 15x17x1 PDF

    Contextual Info: IS61DDP2B21M18A IS61DDP2B251236A 1Mx18, 512Kx36 18Mb DDR-IIP Burst 2 CIO Synchronous SRAM (2.0 Cycle Read Latency) FEATURES •                   512Kx36 and 1Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid


    Original     		IS61DDP2B21M18A IS61DDP2B251236A 1Mx18, 512Kx36 1Mx18 400MHz 333MHz 300MHz PDF

    Contextual Info: IS61QDP2B41M18A/A1/A2 IS61QDP2B451236A/A1/A2 1Mx18 , 512Kx36 18Mb QUADP Burst 4 SYNCHRONOUS SRAM (2.0 Cycle Read Latency) FEATURES •                     512Kx36 and 1Mx18 configuration available.


    Original     		IS61QDP2B41M18A/A1/A2 IS61QDP2B451236A/A1/A2 1Mx18 512Kx36 1Mx18 13x15 PDF

    SN146-1R0

    Abstract: capacitor 1000uF 16V SN146 IRF FET McMaster-Carr schematic diagram PWM 12V 30a 1000uf, 6.3v electrolytic capacitor 18a sot23 1000uf, 16v electrolytic capacitor capacitor 1000uF/16V
    Contextual Info: IRPP3637-18A POWIR+ Chipset Reference Design 18Amp Single Phase Synchronous Buck POWIR+TM Chipset Reference Design using IR3637SPBF PWM & Driver IC and IRLR8713PBF & IRLR7843PBF D-Pak MOSFETs By Steve Oknaian, Senior Applications Engineer Table of Contents


    Original     		IRPP3637-18A 18Amp IR3637SPBF IRLR8713PBF IRLR7843PBF IR3637AS IRF8910 IRPP3637-12A 400kHz IR3637S SN146-1R0 capacitor 1000uF 16V SN146 IRF FET McMaster-Carr schematic diagram PWM 12V 30a 1000uf, 6.3v electrolytic capacitor 18a sot23 1000uf, 16v electrolytic capacitor capacitor 1000uF/16V PDF

    Contextual Info: K7A163600A K7A163200A K7A161800A PRELIMINARY 512Kx36/x32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/x32 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. 0.0 0.1 0.2 0.3 History Draft Date Remark Initial draft 1. Add JTAG Scan Order


    Original     		K7A163600A K7A163200A K7A161800A 512Kx36/x32 1Mx18 1Mx18-Bit 165FBGA K7A1636 PDF

    IS61QDB41M18A

    Contextual Info: IS61QDB41M18A IS61QDB451236A 1Mx18, 512Kx36 18Mb QUAD Burst 4 SYNCHRONOUS SRAM FEATURES •                   512Kx36 and 1Mx18 configuration available. On-chip Delay-Locked loop (DLL) for wide data valid


    Original     		IS61QDB41M18A IS61QDB451236A 1Mx18, 512Kx36 1Mx18 13x15 PDF

    IS61QDB22M36A

    Contextual Info: IS61QDB24M18A IS61QDB22M36A 4Mx18, 2Mx36 72Mb QUAD Burst 2 Synchronous SRAM FEATURES •                  2Mx36 and 4Mx18 configuration available. On-chip Delay-Locked loop (DLL) for wide data valid window.


    Original     		IS61QDB24M18A IS61QDB22M36A 4Mx18, 2Mx36 2Mx36 4Mx18 13x15 IS61QDB22M36A-333B4I IS61QDB22M36A-333B4LI IS61QDB24M18A-333B4I IS61QDB22M36A PDF

    IS61QDB42M36A

    Abstract: B0821
    Contextual Info: IS61QDB44M18A IS61QDB42M36A 4Mx18, 2Mx36 72Mb QUAD Burst 4 SYNCHRONOUS SRAM FEATURES •                   2Mx36 and 4Mx18 configuration available. On-chip Delay-Locked Loop (DLL) for wide data valid window.


    Original     		IS61QDB44M18A IS61QDB42M36A 4Mx18, 2Mx36 2Mx36 4Mx18 IS61QDB42M36A-400B4I IS61QDB42M36A-400B4LI IS61QDB44M18A-400B4I IS61QDB44M18A-400B4LI IS61QDB42M36A B0821 PDF

    Contextual Info: IS61QDPB42M18A/A1/A2 IS61QDPB41M36A/A1/A2 2Mx18, 1Mx36 36Mb QUADP Burst 4 SYNCHRONOUS SRAM (2.5 Cycle Read Latency) FEATURES • • • • • • • • • • • • • • • • • • • • • 1Mx36 and 2Mx18 configuration available. On-chip Delay-Locked Loop (DLL) for wide data


    Original     		IS61QDPB42M18A/A1/A2 IS61QDPB41M36A/A1/A2 2Mx18, 1Mx36 2Mx18 QV13x15 13x15 PDF

    Contextual Info: IS61DDB21M18A IS61DDB251236A 1Mx18, 512Kx36 18Mb DDR-II Burst 2 CIO Synchronous SRAM FEATURES •                  512Kx36 and 1Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid


    Original     		IS61DDB21M18A IS61DDB251236A 1Mx18, 512Kx36 1Mx18 oux18 PDF

    Contextual Info: IS61QDP2B41M18A/A1/A2 IS61QDP2B451236A/A1/A2 1Mx18 , 512Kx36 18Mb QUAD-P Burst 4 SYNCHRONOUS SRAM (2.0 Cycle Read Latency) FEATURES •                    512Kx36 and 1Mx18 configuration available.


    Original     		IS61QDP2B41M18A/A1/A2 IS61QDP2B451236A/A1/A2 1Mx18 512Kx36 1Mx18 400MHz 333MHz 300MHz PDF

    Contextual Info: IS61DDB41M18A IS61DDB451236A 1Mx18, 512Kx36 18Mb DDR-II Burst 4 CIO Synchronous SRAM FEATURES •                  512Kx36 and 1Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid


    Original     		IS61DDB41M18A IS61DDB451236A 1Mx18, 512Kx36 1Mx18 levx18 PDF

    IS61DDB21M36A

    Contextual Info: IS61DDB22M18A IS61DDB21M36A 2Mx18, 1Mx36 36Mb DDR-II Burst 2 CIO SYNCHRONOUS SRAM FEATURES •                  1Mx36 and 2Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid


    Original     		IS61DDB22M18A IS61DDB21M36A 2Mx18, 1Mx36 1Mx36 2Mx18 13x15 PDF

    Contextual Info: IS61DDP2B24M18A/A1/A2 IS61DDP2B22M36A/A1/A2 4Mx18, 2Mx36 72Mb DDR-IIP Burst 2 CIO SYNCHRONOUS SRAM (2.0 Cycle Read Latency) FEATURES •                     2Mx36 and 4Mx18 configuration available.


    Original     		IS61DDP2B24M18A/A1/A2 IS61DDP2B22M36A/A1/A2 4Mx18, 2Mx36 4Mx18 13x15 PDF

    Contextual Info: IS61DDP2B24M18A/A1/A2 IS61DDP2B22M36A/A1/A2 4Mx18, 2Mx36 72Mb DDR-IIP Burst 2 CIO Synchronous SRAM (2.0 Cycle Read Latency) FEATURES •                   2Mx36 and 4Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid


    Original     		IS61DDP2B24M18A/A1/A2 IS61DDP2B22M36A/A1/A2 4Mx18, 2Mx36 4Mx18 400MHz 333MHz 300MHz PDF