13MAR2002 Search Results

Contextual Info: 13MAR2002 THIS DRAWING IS U N P U B LIS H E D . A LL RIGHTS RESERVED. > —1 z o Ol o ° ° V R E L E A S E D F O R P U B L IC A T IO N COPYRIGHT B Y TY C O E LE C T R O N IC S C O R P O R A T IO N . V 7:46pm »? m t~>C0 m |+ 1 + 1+ 1+ O u O O O " C*J K hO

VDR 0047

Abstract: UB 40 M68AW256M TFBGA48 TSOP44
Contextual Info: M68AW256M 4 Mbit 256K x16 3.0V Asynchronous SRAM FEATURES SUMMARY • SUPPLY VOLTAGE: 2.7 to 3.6V ■ 256K x 16 bits SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIME: 55ns ■ SINGLE BYTE READ/WRITE ■ LOW STANDBY CURRENT ■ LOW VCC DATA RETENTION: 1.5V

circuit diagram ballast 24v

Abstract: ccfl neon SLUA088 PUSHPULL CONVERTER TRANSFORMER DESIGN NOTES
Contextual Info: application INFO available UC1872 UC2872 UC3872 Resonant Lamp Ballast Controller FEATURES DESCRIPTION • Controls Different Types of Lamps: Cold Cathode Fluorescent, Neon, and Gas Discharge The UC3872 is a resonant lamp ballast controller optimized for driving

SN7401

Contextual Info: SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998 D D D D D D D D D D SN55115 . . . J OR W PACKAGE SN75115 . . . N PACKAGE TOP VIEW Choice of Open-Collector or Active Pullup (Totem-Pole) Outputs Single 5-V Supply

Contextual Info: SN54HC367, SN74HC367 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS309B – JANUARY 1996 – REVISED MAY 1997 D D D SN54HC367 . . . J OR W PACKAGE SN74HC367 . . . D OR N PACKAGE TOP VIEW High-Current 3-State Outputs Drive Bus Lines, Buffer Memory Address Registers,

Contextual Info: SN54HC05, SN74HC05 HEX INVERTERS WITH OPEN-DRAIN OUTPUTS SCLS080B – MARCH 1984 – REVISED MAY 1997 D SN54HC05 . . . J OR W PACKAGE SN74HC05 . . . D OR N PACKAGE TOP VIEW Package Options Include Plastic Small-Outline (D) and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and

code bootstrap loader MSP430

Abstract: msp430f112
Contextual Info: MSP430F11x MIXED SIGNAL MICROCONTROLLER SLAS256B – NOVEMBER 1999 – REVISED JUNE 2000 D D D D D D D D Low Supply Voltage Range 1.8 V – 3.6 V Ultralow-Power Consumption Low Operation Current, 1.6 µA at 4 kHz, 2.2 V 200 µA at 1 MHz, 2.2 V Five Power Saving Modes:

Contextual Info: CY54FCT540T, CY74FCT540T 8-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCCS029A – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D OEA D0 D1 D2 D3 D4 D5 D6 D7 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OEB O0 O1 O2 O3 O4 O5 O6 O7 CY54FCT540T . . . L PACKAGE

HC541

Contextual Info: SN54HC541, SN74HC541 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS305A – JANUARY 1996 – REVISED MAY 1997 D D D SN54HC541 . . . J OR W PACKAGE SN74HC541 . . . DW, N, OR PW PACKAGE TOP VIEW High-Current 3-State Outputs Drive Bus Lines Directly or up to 15 LSTTL Loads

ABT8245

Contextual Info: SN54ABT8245, SN74ABT8245 SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS SCBS124D – AUGUST 1992 – REVISED DECEMBER 1996 D D D D D D SN54ABT8245 . . . JT PACKAGE SN74ABT8245 . . . DW PACKAGE TOP VIEW Members of the Texas Instruments SCOPE  Family of Testability Products

Contextual Info: M68AW256M 4 Mbit 256K x16 3.0V Asynchronous SRAM FEATURES SUMMARY • SUPPLY VOLTAGE: 2.7 to 3.6V ■ 256K x 16 bits SRAM with OUTPUT ENABLE ■ EQUAL CYCLE and ACCESS TIME: 55ns, 70ns ■ SINGLE BYTE READ/WRITE ■ LOW STANDBY CURRENT ■ LOW VCC DATA RETENTION: 1.5V

vs2 servo motor

Abstract: bidirectional dc motor drive uc1637 UC3637 uc3637 U102 application note
Contextual Info: UC1637 UC2637 UC3637 Switched Mode Controller for DC Motor Drive FEATURES DESCRIPTION • Single or Dual Supply Operation • ±2.5V to ±20V Input Supply Range • ±5% Initial Oscillator Accuracy; ± 10% Over Temperature The UC1637 is a pulse width modulator circuit intended to be used for a variety of

SN74LS08P

Abstract: sn74ls08n TTL SN74LS08
Contextual Info: SN5408, SN54LS08, SN54S08 SN7408, SN74LS08, SN74S08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SDLS033 – DECEMBER 1983 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

Contextual Info: [ /Title CD74H C4049, CD74H C4050 /Subject (High Speed CMOS Logic Hex CD54/74HC4049, CD54/74HC4050 Data sheet acquired from Harris Semiconductor SCHS205B High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting February 1998 - Revised May 2000 Features

Contextual Info: SN54LVTH2245, SN74LVTH2245 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS707C – SEPTEMBER 1997 – REVISED APRIL 1999 D D D D D D D DIR A1 A2 A3 A4 A5 A6 A7 A8 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7

Contextual Info: SN54AHC123A, SN74AHC123A DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS SCLS352F – JULY 1997 – REVISED AUGUST 2000 D D D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Operating Range 2-V to 5.5-V VCC Schmitt-Trigger Circuitry On A, B, and CLR

Contextual Info: SN54F74, SN74F74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SDFS046A – MARCH 1987 – REVISED OCTOBER 1993 • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs

Contextual Info: UC1524A UC2524A UC3524A Advanced Regulating Pulse Width Modulators FEATURES • • • DESCRIPTION The UC1524A family of regulating PWM ICs has been designed to retain the same highly versatile architecture of the industry standard UC1524 SG1524 while offering substantial improvements to many of its limitations. The UC1524A

EMIF SDRAM

Contextual Info: TMS320C6202, TMS320C6202B FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS SPRS104C – OCTOBER 1999 – REVISED DECEMBER 2000 D D D D D Signal Processors DSPs – TMS320C62x – 5-, 4-ns Instruction Cycle Time – 200-, 250-MHz Clock Rate – Eight 32-Bit Instructions/Cycle

transformer 5024

Abstract: Pulse Transformer 5024 UC1525BJ SLUA170
Contextual Info: UC1525B UC1527B UC2525B UC2527B UC3525B UC3527B Regulating Pulse Width Modulators FEATURES • • • • • • • • • • • • DESCRIPTION The UC1525B/1527B series of pulse width modulator integrated circuits are designed to offer improved performance and lowered external parts count when

Contextual Info: SN54HC259, SN74HC259 8-BIT ADDRESSABLE LATCHES SCLS134B – DECEMBER 1982 – REVISED MAY 1997 D D D D D D 8-Bit Parallel-Out Storage Register Performs Serial-to-Parallel Conversion With Storage Asynchronous Parallel Clear Active-High Decoder Enable Input Simplifies Expansion

DPak Package size

Abstract: 418B-03
Contextual Info: MTB60N05HDL Preferred Device Power MOSFET 60 Amps, 50 Volts, Logic Level N–Channel D2PAK The D2PAK package has the capability of housing a larger die than any existing surface mount package which allows it to be used in applications that require the use of surface mount components with

10h161

Abstract: circuit of 1-8 demultiplexer
Contextual Info: MC10H161 Binary to 1-8 Decoder Low The MC10H161 provides parallel decoding of a three bit binary word to one of eight lines. The MC10H161 is useful in high–speed multiplexer/demultiplexer applications. The MC10H161 is designed to decode a three bit input word to one

TA 2911

Abstract: dta124e transistor product line manuals DTA114E SERIES 1803AM DTB113E Bias Resistor Transistor TRANSISTOR MANUALS
Contextual Info: DTA114E SERIES Preferred Devices Bias Resistor Transistor PNP Silicon Surface Mount Transistor with Monolithic Bias Resistor Network This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT Bias Resistor