135PIN Search Results

3303P

Abstract: PGA135-C-S14U-2
Contextual Info: 135S8-F Metal seal 135pin PGA EIAJ Package Code PGA135-C-S14U-2.54 JEDEC Code – 37.084±0.4 Weight g 11.05 4.49MAX 33.02±0.3 3.3±0.3 P N M L K J H G F E D C B A 33.02±0.3 2.54TYP φ1.27TYP 37.084±0.4 φ0.46±0.05 2.54TYP 14 13 12 11 10 9 8 INDEX AREA

Voltage-Controlled-Attenuator

Abstract: OPA221 JEDEC J-STD-020d 842 FET ch8c *vp1208 AFE5807 AFE5808AZCF
Contextual Info: AFE5808A www.ti.com SLOS729B – OCTOBER 2011 – REVISED APRIL 2012 Fully Integrated, 8-Channel Ultrasound Analog Front End with Passive CW Mixer, 0.75 nV/rtHz, 14/12-Bit, 65 MSPS, 158 mW/CH Check for Samples: AFE5808A FEATURES APPLICATIONS • • • 1

Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS07-16309-2E 32-Bit Microcontroller CMOS FR65E Series MB91307A • DESCRIPTION The FUJITSU FR family of single-chip microcontrollers using a 32-bit high-performance RISC CPU, with a variety of built-in I/O resources and bus control mechanisms for built-in control applications requiring high-capability, highspeed CPU processing. External bus access is assumed in order to support the expanded address space accessible by the 32-bit CPU, and a 1 KB cache memory plus large 128 KB RAM are provided for high-speed

Contextual Info: Spansion Analog and Microcontroller Products The following document contains information on Spansion analog and microcontroller products. Although the document is marked with the name “Fujitsu”, the company that originally developed the specification, Spansion

HD64400

Abstract: SOLID STATE d2n 102 bg
Contextual Info: ADE-202-034 O Oct. 1989 HD64400 (Graphic Data Processor) GDP 0 HITACHI Description The HD64400 is a graphic data processing chip with high-speed drawing functions and an extensive set of display functions. It can control a wide range of raster-scan CRT displays, ranging from low to high resolution, and

FR30

Abstract: MB2197-10 MB2197-101 MB2197-102 MB91101 QFP-100
Contextual Info: FR30 Emulator Setup Instructions Page 1 FR30 Emulator Setup Instructions  Fujitsu Mikroelektronik GmbH Vers. 1.1 This manual shows how to setup the FR30 Emulator MB2197 system. Follow these instructions step by step in order to install both hardware and software components

HD641016

Contextual Info: HD81831Y10 DSP-I — Preliminary Digital Signal Processor (100 ns version) The HD81831Y10(DSP-I) is a single chip proces­ sor with storedprogram capability designed for digital signal processing including image processing. • • • The DSP-I can perform multiply and accumulate at

diode c02

Contextual Info: PIN GRID ARRAY PACKAGE FUJITSU SEMICONDUCTOR DATA SHEET 135 PIN CERAMIC To Top / Package Lineup / Package Index PGA-135C-C02 135-pin ceramic PGA Lead pitch 100 mil Pin matrix 14 Sealing method Metal seal PGA-135C-C02 135-pin ceramic PGA (PGA-135C-C02) 0.46 +– 0.18

ultrasound transducer circuit mixer

Abstract: ultrasonic fpga SBAA150 Voltage-Controlled-Attenuator
Contextual Info: AFE5807 www.ti.com SLOS703B – SEPTEMBER 2010 – REVISED APRIL 2012 Fully Integrated, 8-Channel Ultrasound Analog Front End with Passive CW Mixer, 1.05 nV/rtHz, 12-Bit, 80 MSPS, 117 mW/CH Check for Samples: AFE5807 FEATURES APPLICATIONS • • • 1 •

PGA-135C-A01

Abstract: PGA135-C-S14U-1 pga 180
Contextual Info: PIN GRID ARRAY PACKAGE FUJITSU SEMICONDUCTOR DATA SHEET 135 PIN CERAMIC To Top / Package Lineup / Package Index PGA-135C-A01 EIAJ code :∗PGA135-C-S14U-1 135-pin ceramic PGA Lead pitch 100 mil Pin matrix 14 Sealing method Metal seal PGA-135C-A01 135-pin ceramic PGA

dad2000

Abstract: dlp dad2000 DRV777 block diagram of mri scanner block diagram of ultrasound scanner dmd 0.95 1080p doppler radar circuit for speed sensing wifi ecg machine ecg semiconductors replacement guide DDC4100
Contextual Info: imaging TI HealthTech Engineering components for life. 2013 www.ti.com/healthtech TI HealthTech ➔ Table of Contents Disclaimer TI products are not authorized for use in safety-critical applications such as life support where a failure of the TI product would reasonably be expected

111-CA

Abstract: Voltage-Controlled-Attenuator
Contextual Info: AFE5807 www.ti.com SLOS703C – SEPTEMBER 2010 – REVISED MAY 2013 Fully Integrated, 8-Channel Ultrasound Analog Front End with Passive CW Mixer, 1.05 nV/rtHz, 12-Bit, 80 MSPS, 117 mW/CH Check for Samples: AFE5807 FEATURES DESCRIPTION • The AFE5807 is an integrated Analog Front-End

STC 1r0

Abstract: M3321 m33210 mitsubishi bcr mitsubishi ipm l1
Contextual Info: MITSUBISHH MICMPTR/MIPRC blE D 1=24=1020 GD17flSb D27 IMIT4 M ITSUBISHI LS U G N " CBOi . M 3 3 2 1 0 G S -2 0 /F P -2 0 o cW Ct 3 2 -B IT M IC R O P R O C E S S O R M 3 2 /1 0 0 GENERAL DESCRIPTION M 33210G S-20/FP -20 M 3 2 /1 0 0 ), a m em b er oI the high-

Contextual Info: AFE5808A www.ti.com SLOS729C – OCTOBER 2011 – REVISED JANUARY 2014 Fully Integrated, 8-Channel Ultrasound Analog Front End With Passive CW Mixer, 0.75 nV/rtHz, 14/12-Bit, 65 MSPS, 158 mW/CH Check for Samples: AFE5808A FEATURES APPLICATIONS • • •

Contextual Info: PIN GRID ARRAY PACKAGE FUJITSU SEMICONDUCTOR DATA SHEET 135 PIN CERAMIC PGA-135C-A05 135-pin ceramic PGA Lead pitch 100 mil Pin matrix 14 Sealing method Metal seal PGA-135C-A05 135-pin ceramic PGA (PGA-135C-A05) 2.54 ± 0.25 (.100 ± .010) 32.99 (1.299)

Contextual Info: PIN GRID ARRAY PACKAGE FUJITSU SEMICONDUCTOR DATA SHEET 135 PIN CERAMIC PGA-135C-A06 135-pin ceramic PGA Lead pitch 100 mil Pin matrix 14 Sealing method Metal seal PGA-135C-A06 135-pin ceramic PGA (PGA-135C-A06) 2.54±0.25 (.100±.010) 1.60(.063) MAX 15.01(.591)

PGA135-C-S14U-2

Contextual Info: PIN GRID ARRAY PACKAGE FUJITSU SEMICONDUCTOR DATA SHEET 135 PIN CERAMIC PGA-135C-A02 EIAJ code :∗PGA135-C-S14U-2 135-pin ceramic PGA Lead pitch 100 mil Pin matrix 14 Sealing method Metal seal PGA-135C-A02 135-pin ceramic PGA (PGA-135C-A02) 2.54±0.25 (.100±.010)

Contextual Info: PIN GRID ARRAY PACKAGE FUJITSU SEMICONDUCTOR DATA SHEET 135 PIN CERAMIC To Top / Package Lineup / Package Index PGA-135C-A06 135-pin ceramic PGA Lead pitch 100 mil Pin matrix 14 Sealing method Metal seal PGA-135C-A06 135-pin ceramic PGA (PGA-135C-A06) 2.54±0.25

Contextual Info: AFE5807 SLOS703A – SEPTEMBER 2010 – REVISED DECEMBER 2011 www.ti.com Fully Integrated, 8-Channel Ultrasound Analog Front End with Passive CW Mixer, 1.05 nV/rtHz, 12-Bit, 80 MSPS, 117 mW/CH FEATURES DESCRIPTION • The AFE5807 is an integrated Analog Front-End

Contextual Info: H D 81831Y 10 DSP-i Prelim inary Digital Signal Processor (100 ns version) The HD81831Y10(DSP-I) is a single chip proces­ sor with storedprogram capability designed for digital signal processing including image processing. The DSP-I can perform multiply and accumulate at

FR30

Abstract: MB2197-10 MB2197-101 MB2197-102 MB91101 QFP-100
Contextual Info: FR30 Emulator Setup Instructions Page 1 FR30 Emulator Setup Instructions  Fujitsu Mikroelektronik GmbH Vers. 1.2 This manual shows how to setup the FR30 Emulator MB2197 system. Follow these instructions step by step in order to install both hardware and software components

Contextual Info: AFE5808A www.ti.com SLOS729C – OCTOBER 2011 – REVISED JANUARY 2014 Fully Integrated, 8-Channel Ultrasound Analog Front End With Passive CW Mixer, 0.75 nV/rtHz, 14/12-Bit, 65 MSPS, 158 mW/CH Check for Samples: AFE5808A FEATURES APPLICATIONS • • •

HD64400

Abstract: FBNL 170 CKD 8E FBNL 41
Contextual Info: HD64400 GDP Graphic Data Processor Description T h e H D 6 4 4 0 0 is a grap h ic d ata pro cessin g chip w ith h i g h - s p e e d d r a w in g f u n c tio n s a n d an extensive set o f display functions. It can c o n tro l a w id e ra n g e o f ra ster-sc a n CRT

Contextual Info: FUJITSU SEMICONDUCTOR DATA SHEET DS07-16309-3E 32-Bit Microcontroller CMOS FR65E Series MB91307R • DESCRIPTION The FUJITSU FR family of single-chip microcontrollers using a 32-bit high-performance RISC CPU, with a variety of built-in I/O resources and bus control mechanisms for built-in control applications requiring high-capability,