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    half-adder by using D flip-flop

    Abstract: cmos dual s-r latch "Dual-Port RAM" 8.2K Resistor 5v library 8635 p ac-dc inverter circuit ATC25 IO33
    Contextual Info: Features • Comprehensive Library of Standard Logic Cells • ATC25 I/O Cells Designed to Operate with VDD = 2.5V ± 0.25V as Main Target Operating Conditions • IO33 and IO50 Pad Libraries Provide Interfaces to 3V and 5V Environments • Memory Cells Compiled to the Precise Requirements of the Design


    Original
    ATC25 ATC25 1306BS 08/99/0M half-adder by using D flip-flop cmos dual s-r latch "Dual-Port RAM" 8.2K Resistor 5v library 8635 p ac-dc inverter circuit IO33 PDF