128 SAL Search Results

AS85049/128-3 and AS85049/128-4

Contextual Info: AS85049 AS85049/128-3 and AS85049/128-4 BandMaster Clamping Band TM Standard Length, Flat or Precoiled 3 = Standard Length 4 = Precoiled M85049/128 - 3 B Basic Part Number M85049/128 = BandMasterTM Clamping Band Standard Band M85049/128-3 and Precoiled Standard Band M85049/128-4

TSOP-20 FOOTPRINT

Abstract: AM29PDL PL032J 000000h-000FFFh pl064j70baw12 SA55
Contextual Info: S29PL127J/S29PL129J/S29PL064J/S29PL032J 128/128/64/32 Megabit 8/8/4/2 M x 16-Bit CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIOTM Control PRELIMINARY Distinctive Characteristics ARCHITECTURAL ADVANTAGES „ „ 128/128/64/32 Mbit Page Mode devices

PL064J60BFI12

Abstract: S29PL064J60BFI12 PL032J70BFI12 S29PL032J70BFI12 PL064J70BFW12 PL032J60BFI12 S29PL032J60BFI12 SA1115 S29PL127J60BFI00 pl032j
Contextual Info: S29PL127J/S29PL129J/S29PL064J/S29PL032J 128/128/64/32 Megabit 8/8/4/2 M x 16-Bit CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIOTM Control PRELIMINARY Distinctive Characteristics ARCHITECTURAL ADVANTAGES „ „ 128/128/64/32 Mbit Page Mode devices

Contextual Info: 85C72 Microchip IK 128 x 8 CMOS Serial Electrically Erasable PROM FEATURES DESCRIPTION • Low power CMOS technology The Microchip Technology Inc. 85C72 is a 1K bit Elec­ • Organized as one block of 128 bytes (128 x 8) trically Erasable PROM. The device is organized as 128

RC28F128J3D-75

Abstract: PC28F128J3D-75 PC28F640J3D-75 JS28F128J3D-75 RC28F128J3D JS28F320J3D-75 te28f640j3d JS28F640J3D75 TE28F128J3D TE28F128J3D-75
Contextual Info: Intel Embedded Flash Memory J3 v. D (32, 64, and 128 Mbit) Datasheet Product Features • ■ ■ Architecture — High-density symmetrical 128-Kbyte blocks —128 Mbit (128 blocks) —64 Mbit (64 blocks) —32 Mbit (32 blocks) Performance — 75 ns Initial Access Speed (128/64/32

SAB10

Abstract: IDT72V70180
Contextual Info: 3.3 VOLT Time Slot Interchange Digital Switch 128 x 128 FEATURES: ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ 128 x 128 channel non-blocking switching at 2.048 Mb/s Per-channel variable or constant throughput delay Automatic identification of ST-BUS /GCI interfaces

d23019

Abstract: IDT728981
Contextual Info: PRELIMINARY IDT728981 Time Slot Interchange Digital Switch 128 x 128 FEATURES: ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ outputs, each of which consists of 32 channels 64 Kbit/s per channel to form a multiplexed 2.048 Mb/s stream. 128 x 128 channel non-blocking switch

IDT72V70180

Contextual Info: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 128 x 128 FEATURES: • • • • • • • • • • • • • 128 x 128 channel non-blocking switching at 2.048 Mb/s Per-channel variable or constant throughput delay Automatic identification of ST-BUS /GCI interfaces

72V8981

Abstract: IDT72V8981
Contextual Info: 3.3 VOLT Time Slot Interchange Digital Switch 128 x 128 FEATURES: ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ PRELIMINARY IDT72V8981 outputs, each of which consists of 32 channels 64 Kbit/s per channel to form a multiplexed 2.048 Mb/s stream. 128 x 128 channel non-blocking switch

Contextual Info: 85C72 & M icro ch ip IK 128 x 8 CMOS Serial Electrically Erasable PROM FEATURES DESCRIPTION • Low power CMOS technology The Microchip Technology Inc. 85C72 is a 1K bit Elec­ • Organized as one block of 128 bytes (128 x 8) trically Erasable PROM. The device is organized as 128

ic HS 2272

Abstract: HS 2272 tic 128d 4051 bf com6123 hd digital converter display 7 seg driver TL 2272 R CI 4026 ci 3842 HCD66750BP
Contextual Info: Preliminary HD66750/1 128 x 128-dot Graphics LCD Controller/Driver with Four-grayscale Functions Rev 0.7 July 26th, 1999 Description The HD66750/1, dot-matrix graphics LCD controller and driver LSI, displays 128-by-128-dot graphics for four monochrome grayscales. Since the HD66750/1 incorporates bit-operation functions and a 16-bit

js28F128j3f75

Abstract: JS28F128J3f-75 28F640J3D js28f640j3f75 js28f640J3F JS28F128J3F numonyx embedded Flash memory JS28F640J3F-75 PC28F640J3F75 RC28F640J3
Contextual Info: Numonyx Embedded Flash Memory J3 65 nm Single Bit per Cell (SBC) 32, 64, and 128 Mbit Datasheet Product Features „ „ „ „ Architecture — Symmetrical 128-KB blocks — 128 Mbit (128 blocks) — 64 Mbit (64 blocks) — 32 Mbit (32 blocks) — Blank Check to verify an erased block

TDA+7279

Contextual Info: Model 7279 Crimp Die Set For Sizes .178/.128/.068 Model 7279 Crimp Die Set For Sizes .178/.128/.068 Features • • • • Professional grade precision die set Cavity dimensions are .178, .128, and .068 Easily changeable Use with Pomona Crimp Tool 7277 Ordering Information

Contextual Info: CY7C1347G 4-Mbit 128 K x 36 Pipelined Sync SRAM 4-Mbit (128 K × 36) Pipelined Sync SRAM Functional Description Features • Fully registered inputs and outputs for pipelined operation ■ 128 K × 36 common I/O architecture ■ 3.3 V core power supply (VDD)

Contextual Info: Freescale Semiconductor Technical Data MSC7118 Rev. 0, 9/2005 MSC7118 Low-Cost 16-Bit DSP with DDR Controller JTAG AMDMA 128 OCE10 to IPBus SC1400 Core M2 SRAM 128 ASM2 64 MUX JTAG Port DMA 32 Channel (192 KB) 64 64 DSP Extended Core Boot ROM (8 KB) 128

Contextual Info: Freescale Semiconductor Technical Data MSC7118 Rev. 2, 10/2005 MSC7118 Low-Cost 16-Bit DSP with DDR Controller JTAG AMDMA 128 OCE10 to IPBus SC1400 Core M2 SRAM 128 ASM2 64 MUX JTAG Port DMA 32 Channel (192 KB) 64 64 DSP Extended Core Boot ROM (8 KB) 128

d 5702

Abstract: transistor d 5702 72V8981 IDT72V8981
Contextual Info: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 128 x 128 FEATURES: • • • • • • • • • IDT72V8981 and output channels. Those 128 channels are divided into 4 serial inputs and outputs, each of which consists of 32 channels 64 Kbit/s per channel to form

Contextual Info: CY7C1347G 4-Mbit 128 K x 36 Pipelined Sync SRAM 4-Mbit (128 K × 36) Pipelined Sync SRAM Features Functional Description • Fully registered inputs and outputs for pipelined operation ■ 128 K × 36 common I/O architecture ■ 3.3 V core power supply (VDD)

128/128 lcd graphic display connections

Abstract: SCROLLING LED DISPLAY CIRCUIT diagram DISPLAY DOBLE WM9 datasheet LG lcd graphics display LCD 128 16 24 graphics monochrome bitblt raster DB9 drawing dot led display large size with circuit diagram LED Clock Display DOBLE
Contextual Info: HD66751S 128 x 128-dot Graphics LCD Controller/Driver with Four-grayscale Functions ADE-207-340(Z) Rev 1.0 June 2001 Description The HD66751S, dot-matrix graphics LCD controller and driver LSI, displays 128-by-128-dot graphics for four monochrome grayscales. Since the HD66751S incorporates bit-operation functions and a 16-bit highspeed bus interface, it enables efficient data transfer and high-speed rewriting of data in the graphics RAM.

Contextual Info: CY14C101I CY14B101I CY14E101I PRELIMINARY 1-Mbit 128 K x 8 Serial (I2C) nvSRAM with Real Time Clock e1-Mbit (128 K × 8) Serial (I2C) nvSRAM with Real Time Clock Features • ■ 1-Mbit nonvolatile static random access memory (nvSRAM) ❐ Internally organized as 128 K × 8

Contextual Info: Freescale Semiconductor Technical Data MSC7118 Rev. 1, 10/2005 MSC7118 Low-Cost 16-Bit DSP with DDR Controller JTAG AMDMA 128 OCE10 to IPBus SC1400 Core M2 SRAM 128 ASM2 64 MUX JTAG Port DMA 32 Channel (192 KB) 64 64 DSP Extended Core Boot ROM (8 KB) 128

Contextual Info: Freescale Semiconductor Technical Data MSC7119 Rev. 0, 9/2005 MSC7119 Low-Cost 16-bit DSP with DDR Controller and 10/100 Mbps Ethernet MAC JTAG AMDMA 128 64 OCE10 to IPBus SC1400 Core Trace Buffer 8 KB 64 M2 SRAM (192 KB) 128 Boot ROM (8 KB) 128 ASM2 MUX

Contextual Info: Freescale Semiconductor Technical Data MSC7119 Rev. 1, 10/2005 MSC7119 Low-Cost 16-bit DSP with DDR Controller and 10/100 Mbps Ethernet MAC JTAG AMDMA 128 64 OCE10 to IPBus SC1400 Core Trace Buffer 8 KB 64 M2 SRAM (192 KB) 128 Boot ROM (8 KB) 128 ASM2 MUX

Contextual Info: Freescale Semiconductor Technical Data MSC7119 Rev. 2, 10/2005 MSC7119 Low-Cost 16-bit DSP with DDR Controller and 10/100 Mbps Ethernet MAC JTAG AMDMA 128 64 OCE10 to IPBus SC1400 Core Trace Buffer 8 KB 64 M2 SRAM (192 KB) 128 Boot ROM (8 KB) 128 ASM2 MUX