125PS Search Results

ICS932S421B

Abstract: 1340G CK410B DOT96 ICS932S421 CK410B-generation
Contextual Info: DATASHEET PCIe Gen2 and QPI Clock for Intel-Based Servers ICS932S421B Key Specifications: • PCIe Gen 2 compliant SRC outputs • QPI & FBD 2 compliant CPU clocks • CPU cycle-cycle jitter: < 50ps • SRC cycle-cycle jitter: < 125ps • PCI cycle-cycle jitter: < 500ps

NM10 Express Chipset

Abstract: 9lprs436 nm10 n450 pin configuration intel atom 9lprs4 INTEL application notes oscillator 2010 9LPRS43
Contextual Info: DATASHEET Low Power Clock for Intel Atom -Based Systems ICS9LPRS436C Key Specifications: • CPU outputs cycle-cycle jitter < 85ps • PCIEX outputs cycle-cycle jitter < 125ps • SATA outputs cycle-cycle jitter < 125ps • PCI outputs cycle-cycle jitter < 500ps

9LPR502

Abstract: ICS9LPR502 intel ck505 clock specification intel ck505 clock specification ics
Contextual Info: Datasheet ICS9LPR502 56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR Recommended Application: Key Specifications: CK505 compliant clock with fully integrated voltage regulator, PCIe Gen 1 compliant • CPU outputs cycle-cycle jitter < 85ps • SRC output cycle-cycle jitter < 125ps

9LPRS477CKL

Abstract: ics9lprs477 9lprs 9LPRS477 RS880
Contextual Info: DATASHEET Programmable System Clock Chip for ATI RD790 - K8TM 9LPRS477C Based Systems Recommended Application: ATI RS780/RS790/RD790/RS880 systems using AMD K8 processors Key Specifications: • CPU outputs cycle-to-cycle jitter < 85ps • SRC outputs cycle-to-cycle jitter < 125ps

9LRS3165BKILFT

Abstract: 9LRS3165 9LRS3165BKILF 9lrs
Contextual Info: 9LRS3165BI Datasheet 64-pin Industrial Temperature Range CK505 Compatible Clock Recommended Application: Industrial temperature CK505 compatible clock Key Specifications: • CPU outputs cycle-cycle jitter < 85ps • SRC output cycle-cycle jitter < 125ps •

ck505

Abstract: 9LPR501 CK-505
Contextual Info: Datasheet ICS9LPR501 64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR Recommended Application: Key Specifications: CK505 compliant clock with fully integrated voltage regulator, PCIe Gen 1 compliant • CPU outputs cycle-cycle jitter < 85ps • SRC output cycle-cycle jitter < 125ps

ICS9LRS

Abstract: MLF64PIN 9LRS3165BKILFT 9lrs USB48MHZ
Contextual Info: 9LRS3165BI Datasheet 64-pin Industrial Temperature Range CK505 Compatible Clock Recommended Application: Industrial temperature CK505 compatible clock Key Specifications: • CPU outputs cycle-cycle jitter < 85ps • SRC output cycle-cycle jitter < 125ps •

ck505

Abstract: ck505 reference 25MHz 9LPR501 intel ck505 clock specification ics idt ck505 ICS9LPR501 VDD96 clock ck505 intel ck505 clock specification
Contextual Info: Datasheet ICS9LPR501 64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR Recommended Application: Key Specifications: CK505 compliant clock with fully integrated voltage regulator, PCIe Gen 1 compliant • CPU outputs cycle-cycle jitter < 85ps • SRC output cycle-cycle jitter < 125ps

9LPR502

Abstract: ck505 56-PIN ICS9LPR502 intel ck505 clock specification 14.318180 crystal
Contextual Info: Datasheet ICS9LPR502 56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR Recommended Application: Key Specifications: CK505 compliant clock with fully integrated voltage regulator, PCIe Gen 1 compliant • CPU outputs cycle-cycle jitter < 85ps • SRC output cycle-cycle jitter < 125ps

ATI rs780

Abstract: RS780 ics9lprs480 9lprs480 9lprs 9lprs4 9LPRS480yKLFT AMD RS780
Contextual Info: ICS9LPRS480 Integrated Circuit Systems, Inc. Programmable System Clock Chip for ATI RS780 - K8TM based Systems Key Specifications: • CPU outputs cycle-to-cycle jitter < 150ps • SRC outputs cycle-to-cycle jitter < 125ps • SB_SRC outputs cycle-to-cycle jitter < 125ps

Contextual Info: Datasheet I CS9 LPR5 0 1 64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR Recommended Application: Key Specifications: CK505 compliant clock with fully integrated voltage regulator, PCIe Gen 1 compliant • CPU outputs cycle-cycle jitter < 85ps • SRC output cycle-cycle jitter < 125ps

Allen-Bradley

Abstract: C37-90 c37 allen bradley ma 156 rockwell INTRONICS
Contextual Info: 1794in-125PS1 30 Watt 125 VDC Power Supply for the Allen-Bradley FLEX I/O System FEATURES • Utility Power Compatibility • 4 Adapter Current Capability • DIN Rail Mounting • • • Input Input Voltage Range: 90 - 156 VDC Input Power: 40 Watts Maximum

Intel NM10

Abstract: 9LPRS436 ck505 atom n450 NM10 Express Chipset 9lprs4 INTEL application notes oscillator 2010 SATA 3 to PCIe 1x 9lprs 9LPRS43 intel atom nm10
Contextual Info: DATASHEET Low Power Clock for Intel Atom -Based Systems ICS9LPRS436C Key Specifications: • CPU outputs cycle-cycle jitter < 85ps • PCIEX outputs cycle-cycle jitter < 125ps • SATA outputs cycle-cycle jitter < 125ps • PCI outputs cycle-cycle jitter < 500ps

ICS9LPR426AGLF-T

Abstract: ICS9LPR426 DOT96 ICS9LPR426A CK410m-compliant FSLA ICS CK410M CK410M 9975
Contextual Info: ICS9LPR426A Advance Information Integrated Circuit Systems, Inc. Low Power Programmable Timing Control Hub for P4™ processor Key Specifications: • CPU outputs cycle-cycle jitter < 85ps • PCIEX outputs cycle-cycle jitter < 125ps Output Features: •

932S421

Abstract: pin configuration intel atom 9LPRS43 9lprs 8087-2 9lprs4 pcie-3
Contextual Info: DATASHEET Low Power Clock for Intel Atom -Based Systems 9LPRS436C Key Specifications: • CPU outputs cycle-cycle jitter < 85ps • PCIEX outputs cycle-cycle jitter < 125ps • SATA outputs cycle-cycle jitter < 125ps • PCI outputs cycle-cycle jitter < 500ps

9LPR501SGLF

Abstract: 9LPR501 CK505 CK505 72 pin 9LPR501SGLFT ICS9LPR CK-505 ck505 reference 25MHz
Contextual Info: Datasheet ICS9LPR501 64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR Recommended Application: Key Specifications: CK505 compliant clock with fully integrated voltage regulator, PCIe Gen 1 compliant • CPU outputs cycle-cycle jitter < 85ps • SRC output cycle-cycle jitter < 125ps

Contextual Info: Datasheet I CS9 LPR5 0 2 56-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR Recommended Application: Key Specifications: CK505 compliant clock with fully integrated voltage regulator, PCIe Gen 1 compliant • CPU outputs cycle-cycle jitter < 85ps • SRC output cycle-cycle jitter < 125ps

rs232 encoder decoder schematic diagram

Abstract: MT8950AC decoding technique of non return to zero format i
Contextual Info: ISO-CMOS ST-BUS FAMILY MITEL MT8950 Data Codec Features ISSUE 4 November 1990 Ordering Information • • Transparent coding and decoding of 0 to 8, 9.6 and 19.2 kbps data Coding compatible to PCM voice channels at 56/64 kbps in ST-BUS format Automatic line polarity detection and correction

KSR128

Abstract: a95x A348 20 pin
Contextual Info: TC514400ÂPL/ÂJL/ASJL/AZL-60 * This is advanced information and specifica­ tions are subject to change without notice. 1,048,576 W ORD x 4 BIT D YN A M IC RAM DESCRIPTION The TC514400APL/AJL/ASJL/AZL is the new generation dynamic RAM organized 1,048,576 words by

2165-P

Abstract: CXB1139
Contextual Info: CXB1139Q/Q-Y Sony, Programmable Delay Line/Duty Cycle Controller Pin Assignment Description The CXB1139Q is an ultra high speed monolithic ECL Delay Line/Duty Cycle Controller IC. Five binary inputs, So to S<, program the delay time from input D in to output Qd in 23 steps. Binary input

clinical Thermometer

Abstract: Thermometer clock LCD ic xl 1507 MSM5052-02 lcd N7 Linear Thermometer ic 3.5-DIGIT lcd IC 2025 Thermometer ic oki c301
Contextual Info: O K I Semiconductor MSM5052-02 Clinical Thermometer with Clock Function GENERAL DESCRIPTION The M SM 5052-02 is an IC, equipped w ith both clinical therm om eter and clock functions. This device uses a therm istor as its sensing elem ent and displays tem peratures in the range of 32 °

k4b2g1646q

Abstract: ddr3 2133 K4B2G1646Q-BCK0 K4B2G1646Q-BCMA
Contextual Info: Rev. 1.03, Mar. 2014 K4B2G1646Q 2Gb Q-die DDR3 SDRAM Only x16 96FBGA with Lead-Free & Halogen-Free RoHS compliant datasheet SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed

TC511664BJl

Abstract: toshiba TC511664BJL TC511664
Contextual Info: T EN TA TIV E D A TA 65,536 W O R D x 16 BIT D Y N A M IC RAM DESCRIPTION T: '1'Call SG4TUL/EZL is the new generation dynamic RAM organized 65,536 words by 16 bits. The lc3 ibJL/'BZL utilizes TOSHIBA'S CMOS Silicon gate process technology as well as advanced

DRIVER 30374

Contextual Info: AV9110 Integrated Circuit Systems, Inc. Serially Programmable Frequency Generator General Description Features The AV9110 generates user specified clock frequencies using an externally generated input reference, such as 14.318 MHz or 10.00 MHz crystal connected between pins 1 and 14. Alter­