1152K Search Results

Contextual Info: DCA-48 TSSOP 12.5mm ´ 8.1mm TAS5760LD www.ti.com SLOS781 – JULY 2013 General Purpose I2S Input Class D Amplifier with DirectPath Headphone / Line Driver Check for Samples: TAS5760LD FEATURES 1 • • • Audio I/O Configuration: – Single Stereo I²S Input

O16L

Abstract: 4856 a A15L A15R IDT70V9389 IDT70V9389L
Contextual Info: ADVANCED IDT70V9389S/L AVAILABLE Q3C99 HIGH-SPEED 3.3V 64K x 18 SYNCHRONOUS DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 7/9/12ns max.

70V3379

Abstract: 70V3389 70V3569 asynchronous dual port SRAM IDT 70824 4kx16 256k x8 SRAM 70V05 70V06
Contextual Info: innovation from the leader multi-port memories from IDT Product Reference Guide communications memory products from IDT innovative solutions for your memory requirements. When designing a new product, you need quick resolution of memory bottlenecks. You need higher performance in a smaller footprint and you

A12L

Abstract: A13L IDT70V9199 IDT70V9199L
Contextual Info: PRELIMINARY IDT70V9199L HIGH-SPEED 3.3V 128K x 9 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 7.5/9/12ns max.

Contextual Info: 3.3V 64/32K X 18 SYNCHRONOUS FOURPORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ True four-ported memory cells which allow simultaneous access of the same memory location Synchronous Pipelined device – 64/32K x 18 organization Pipelined output mode allows fast 200MHz operation

37C65

Abstract: c5287 FE3001 FE3031 T58-T57 D 80287-8 em-180 PFA 10Z FE3010B FE3021
Contextual Info: WESTERN DIGITAL CORP 4QE D m =1710220 Q0QbSS3 Q •■ bil>C fri . „ SYST EM S L Ö GIC / P ERIP H ERA L " ' I ^ T S 1 ^ 3 » '2 . \ FE3021 Address Buffer and Memory Controller •HÜWESTERN DIGITAL H Powered by ICminer.com Electronic-Library Service CopyRight 2003

tip off 0401 transistor circuit 220 v free power

Abstract: E21B 0MSI 300 bd c6500 SDS st2 LC6500 LC6554D BCTF LC6554 lc6554h
Contextual Info: Ordering num ber:EN 2156B F SANYO i No. 2156 B CMOS LSI LC6554D,6554H 4K-Byte ROM-Contained Single-Chip 4-Bit Microcomputers with FLT, LED Drivers r/ /V X . V .;,. "'V. / igis The LC6554D/H are single-chip 4-bit microcomputers that contain a 4K-byte ROM, 1K-hit RAMifpnd havfe 64 pins.

EPCOS 5025 -3

Abstract: EPCOS 5025 0/EPCOS 5025 -3
Contextual Info: Chokes and inductors For high frequency and EMC RF chokes, HBC series Series/Type: B82143A / B82143B 7f…fÁRspp… November 2005 Date: EPCOS AG 2005. Reproduction, publication and dissemination of this publication and the information contained therein without EPCOS’ prior express consent is prohibited.

wl 1281

Contextual Info: HIGH-SPEED 3.3V 64K x18/x16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM IDT70V9389/289L Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6/7.5/9/12ns max.

Contextual Info: HIGH-SPEED 3.3V 64K x 18 DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed access – Commercial: 15/20ns max. – Industrial: 20ns (max.) Low-power operation

Contextual Info: M IT E L _ MT90500 Multi-Channel AAL1 SAR Prelim inary Inform ation S E M IC O N D U C T O R Features AAL1 S egm entation and R eassem bly device com patible w ith S tructured Data Transfer SDT as per ANSI T 1 .630 and ITU 1.363 standards

A12L

Abstract: A15L A15R IDT709389 IDT709389L
Contextual Info: IDT709389L HIGH-SPEED 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 7.5/9/12ns max.

MT90500

Abstract: MT90500AL MVIP-90 ST9 physical layer
Contextual Info: MT90500 Multi-Channel ATM AAL1 SAR Features • • • • • • • • • DS5171 AAL1 Segmentation and Reassembly device compatible with Structured Data Transfer SDT as per ANSI T1.630 and ITU I.363 standards Transports 64kbps and N x 64kbps traffic over

DREAM 4

Contextual Info: SAM5808 AUDIO & MUSIC MULTI-DSP PROCESSOR Key features                   Dream DSP Array of 8 new 24bit/56bit DSP cores P24XT supporting 56bit MAC operations (400M MAC/sec), vector processing, double precision instructions and

Contextual Info: Inductors RF chokes, HBC series Series/Type: B82143A, B82143B The following products presented in this data sheet are being withdrawn. Ordering Code Substitute Product Date of Withdrawal B82143A*/B82143B* B82144A*/B82144B* 2012-10-19 Deadline Last Orders 2013-01-31

epcos 2500

Abstract: cog 10 nF
Contextual Info: E PC O S M u ltila ye r C e ra m ic C a p a c ito rs O rdering co d e s and p ackin g fo r COG, 50 VOC, lead sp a c in g 2,5 m m Am m o packing * a 5 4 Ordering code1 Cr B37979, 50 V D C , 5,5 x 5,0 x 2,5 mm pcs Reel packing *‘ 4 51 pcs/reel Bulk *4 pcs

80286 schematic

Abstract: fe3031 80286 mouse Western Digital floppy disk FE3021A FE3001a FE3031A CHIPset for 80286 8042 keyboard controller floppy controller
Contextual Info: V m =1710226 O O G b b ll T • UDC " T '5 2 - 3 V 2 . 1 FE3021A Address Buffer and Memory Controller g? WESTERN DIGITAL WESTERN D IG IT A L CORP HOE D H =1716523 aO O bblE 1 HUDC FE3021A TABLE OF C O N TEN TS T-52-33-21 Page P R E F A C E .

A12L

Abstract: IDT70V9099
Contextual Info: HIGH-SPEED 3.3V 128K x9/x8 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6/7.5/9/12ns max.

Contextual Info: MT90500 Multi-Channel ATM AAL1 SAR Data Sheet Features September 2003 • AAL1 Segmentation and Reassembly device compatible with Structured Data Transfer SDT as per ANSI T1.630 and ITU I.363 standards • Transports 64kbps and N x 64kbps traffic over ATM AAL1 cells (also over AAL5 or AAL0)

70V38

Abstract: A15L A15R IDT70V38 IDT70V38L
Contextual Info: HIGH-SPEED 3.3V 64Kx 18 DUAL-PORT STATIC RAM PRELIMINARY IDT70V38L F e a tu re s True Dual-Ported m em ory cells w hich allow sim ultaneous access of the sam e m em ory location ♦ High-speed access ♦ - ♦ Com m ercial: 15/20ns max. Low -pow er operation

GD243

Abstract: K2413 BYX 13 400 R IC RTS 993 for electric bell GD243B D0243 autodata cd 2010 til 3010 datasheet MT90500 MT90500AL
Contextual Info: @ MITEL MT90500 Multi-Channel ATM AAL1 SAR S E M IC O N D U C T O R Features DS5171 AAL1 Segmentation and Reassembly device compatible with Structured Data Transfer SDT as per ANSI T 1.630 and ITU 1.363 standards ♦ Transports 64kbps and N x 64kbps traffic over

FCT3807D

Abstract: A12L IDT70V9099
Contextual Info: Š HIGH-SPEED 3.3V 128K x9/x8 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 9/12ns max.

A15L

Abstract: A15R IDT70V9389 IDT70V9389L 4856
Contextual Info: PRELIMINARY IDT70V9389L HIGH-SPEED 3.3V 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 7.5/9/12ns max.

CA3HA

Contextual Info: FE3021 WESTERN DIGITAL aua uai uai piui— L u j> i> |S|3 9 < 11< A2 flEFR 115 A3 Pfes 114 A4 113 AS 112 A6 FE3021 111 A7 110 109 AS AS 108 GROUND 107 VCC 106 ADORI 106 ADORO 104 AD0R2 103 LA17 io e LAIS 101 ADOR3 100 A 00R 4 90 GROUND 96 AOOR9 97 AOOR6 96