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105MATYP Datasheets Context Search
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Contextual Info: 10K / 1 0KH ECL Buffered 10 Tap Delay Modules D32-400 D2ECL .400" Wide DIP 32 Pin Packages, See pg. 31, fig. 4 and Table P-7. D2ECL Style Schematic Vcc 10% 3 0 % 5 0% Vcc 60% 8 0 % 1 00 % GENERAL: For Operating Specifications and Test Conditions, see Tables IV, V and VIII on page 7 of this catalog. Delays |
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d32-400300ppm/105matyp135mamax+6 | |
D2ECL-25
Abstract: DECL-200 50/D2ECL-75
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/10khdecl-10declh-10decl-15+7 | |
Aj3d smd
Abstract: A14D AI3D-10 AI3D-11 AI4D-10 AM2D-10 AM2D-11 AM3D-10 AM3D-11 FAI3D-10
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105matyp150mamax65matypseepage16+11 |