100BL Search Results

64172

Contextual Info: IBM11N8645H IBM11N8735H 8M x 64/72 DRAM MODULE Features • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module • System Performance Benefits: -Non buffered for increased performance • 8Mx64, 8Mx72 Extended Data Out Page Mode DIMMs -Reduced noise 35 Vss/Vcc pins

Contextual Info: IBM11D1365E IBM11D2365E 1M/2M x 36 DRAM Module Features 72-Pin Single-In-Line Memory Module Performance: -60 High Performance C M O S process Single 5V, ± 0.5V Power Supply All inputs & outputs are fully TTL & C M O S compatible Low active current dissipation

1-601805-1

Abstract: 604336-1 1-601806-1 1-604152-1 604161-1
Contextual Info: ëm ? • FLEXI-BLOCK Terminal Block System Product Facts ■ Durable, tough nylon on flexible back — bends without breaking ■ Interchangeable with all standard terminal blocks ■ Two basic parts replace dozens of sizes to solve inventory problem s ■ Size # 6 and size # 8

Contextual Info: IB M 0 1 1 6 4 B 0 IB M 0 1 1 6 4 D 0 4M x 4 Stacked DRAM Features • 4 ,194,304 word by 4 bit organization by 2 High • Package: • 4 ,194,304 word by 4 bit organization by 4 High • Low Power Dissipation per deck - Active (max) - 85m A/75m A - Standby (TTL Inputs) - 2.0m A (max)

Contextual Info: IBM11S2325HP IBM11S4325HP IBM11S2325HM IBM11S4325HM 2M/4M x 32 SO DIMM Module Features • 72-Pin Small Outline Dual-In-Line Memory Module • Performance: -60 -6R -70 I rAC RAS A ccess T im e ; 60ns j 60ns 70ns fcAC CAS Access Tim e i 15ns [ 17ns 20ns AA Access Tim e From Address

Contextual Info: IBM2520L8767 Preliminary ATM Resource Manager Features other uses DRAM devices. A single array of memory can be used in systems whose sus­ tained full-duplex total bandwidth requirement is less than 102Mb/s. • Optimized for server applications. • Configurable for sustained performance of up to

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455

Contextual Info: IBM11M8730HB 8M x 72 DRAM MODULE Features 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module System Performance Benefits: - Buffered inputs except RAS, Data - Reduced noise (32 Vss/Vcc pins) - Buffered PDs 8Mx72 Fast Page Mode DIMM Performance: Fast Page Mode, Read-Modify-Write Cycles

Contextual Info: IBM043610ULAA IBM041810ULAA Prelim inary 32K X 36 & 64K X 18 SRAM Features • Asynchronous Output Enable and Power Down Inputs • 32K x 36 or 64K x 18 Organizations • 0.45 Micron CMOS Technology • Synchronous Flow Thru Mode Of Operation with Self-Timed Late Write

Contextual Info: IB M 1 1 M 1 6 4 5 L 1M x 64 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • 1Mx64 Extended Data Out Page Mode DIMM • Performance: • • • • -60 -70 ;tRAC i RAS Access Time 60ns 70ns ;tcAC 1CAS Access Time 20ns

Contextual Info: IBM11T2640HP 2M x 64 144 PIN SO DIMM Features • 144 Pin JEDEC Standard, 8 Byte Small Outline Dual In-line Memory Module with 8 Byte busses • Au contacts • Optimized for byte-write non-parity applications • Performance: • System Performance Benefits:

Contextual Info: IB M 1 1 D 2 3 2 5 H 2M x 32 DRAM Module Features Thin outline .104” Single 5V ± 0.5V Power Supply Low current consumption All inputs & outputs are fully TTL & CMOS compatible Extended Data Out (EDO) access cycle Refresh Modes: RAS-Only, CBR, and Hidden

Contextual Info: IBM11N4735BB IBM11N4645BB IBM11N4735CB IBM11N4645CB 4M x 64/72 DRAM MODULE Features • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module • 4Mx64, 4Mx72 Extended Data Out Page Mode DIMMs • Performance: • System Performance Benefits:

aui isolation transformer

Abstract: TCI D2S f stmicroelectronics "serial eeprom" 93C46 AD-29 PC99 PQFP128 TCI D2S ad1035
Contextual Info: STE10/100A PCI 10/100 ETHERNET CONTROLLER WITH INTEGRATED PHY 3.3V PRODUCT PREVIEW 1.0 DESCRIPTION The STE10/100 is a high performance PCI Fast Ethernet controller with integrated physical layer interface for 10BASE-T and 100BASE-TX application. It was designed with advanced CMOS technology to

TCI D2S

Abstract: bra1015
Contextual Info: STE10/100A PCI 10/100 ETHERNET CONTROLLER WITH INTEGRATED PHY 3.3V PRODUCT PREVIEW 1.0 DESCRIPTION The STE10/100 is a high performance PCI Fast Ethernet controller with integrated physical layer interface for 10BASE-T and 100BASE-TX application. It was designed with advanced CMOS technology to

Contextual Info: IB M 1 1 N 2 6 4 5 H IB M 1 1 N 2 7 3 5 H 2M x 64/72 DRAM MODULE Features • 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-line Memory Module • Optimized for byte-write non-parity, or ECC appli­ cations • System Performance Benefits: • 2Mx64, 2Mx72 Extended Data Out Page Mode

Contextual Info: IBM0165805B IBM0165805P 8M x 8 12/11 EDO ORAM Features • 8,388,608 word by 8 bit organization Read-Modify-Write • Single 3.3 ± 0.3V power supply Performance: -50 -60 tRAC RAS Access Time 50ns 60ns tCAC CAS Access Time 13ns 15ns • Extended Data Out Hyper Page Mode

Contextual Info: IBM11D4360B IBM11E4360B IBM11D8360B IBM11E8360B 4M/8M x 36 DRAM Module Features High Performance CMOS process Single 5V, ± 0.5V Power Supply All inputs & outputs are fully TTL & CMOS compatible Fast Page Mode access cycle Refresh Modes: RAS-Only, CBR and Hidden

Contextual Info: IB M 0 1 1 6 1 6 0 IB M 0 1 1 6 1 6 0 B IB M 0 1 1 6 1 6 0 M IB M 0 1 1 6 1 6 0 P 1 M x 16 12/8 DRAM Features • 1,048,576 word by 16 bit organization • Single 3.3V ± 0.3V or 5.0V ± 0.5V power supply • Standard Power SP and Low Power (LP) • 4096 Refresh Cycles

crimping microD

Contextual Info: 1.27mm .050" Pitch Commercial Micro-D FEATURES AND SPECIFICATIONS Electrical Features and Benefits • Economical solution for commercial applications requiring Current: 3.0A the density of a microminiature connector Contact Resistance: 8m£2 max. ■ "Crimp and poke" configuration designed for hand or semi­

Contextual Info: IBM11M2730H IBM11M2730HB 2M x 72 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module Au contacts Optimized for ECC applications • 2Mx72 Fast Page Mode DIMM System Performance Benefits: - Buffered inputs except RAS, Data - Reduced noise (32 Vss/Vcc P>ns)

Contextual Info: IBM11D1360Q IBM11E1360Q IBM11D2360Q IBM11E2360Q 1M/2M x 36 DRAM Module Features • 72-Pin Single-In-Line Memory Module • Performance: -60 -70 : W c ; RAS Access Time 60ns 70ns I tcAC i CAS Access Time 15ns 20ns 30ns 35ns j Iaa !Access Time From Address

100DG

Abstract: 100DJ 100AB 100AC 100BA 100BB 100BC 100CA 100CB 100CC
Contextual Info: OA K / n C COY ELEK-. OV E N A I M5E D b75ô510 DQ00374 13T • OKPI -5 V JC C O Y TCXO's 100 Series, .2 to 25 MHz, TTL or HCMOS |K*: ' f The 100 sériés is designed for.+5VDC, TTL3 r or HCMOS applications requiring a space „ if,saving enclosure and- moderate s ta b ilitie s ^

Contextual Info: SED1651 SED1651 LOW-POWER 100-BIT LCD COMMON DRIVER • DESCRIPTION The SED1651 is a 100-output dot matrix LCD common row driver for driving high-capacity LCD panels at duty cycles higher than 1/64 (up to 1/300). The LSI has a wide range of the LCD driving voltages,