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    Catalog Datasheet Type Document Tags PDF

    Contextual Info: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains


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    hi-6130hi-6131hi-6132mil-std-1553+4mil-std-1760hi-613xmil-std-1553b121bga PDF

    Contextual Info: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains


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    hi-6130hi-6131hi-6132mil-std-1553+3mil-std-1760hi-613xmil-std-1553b PDF

    STI3400

    Abstract: connector h20
    Contextual Info: module fifo title ’ PLX TECHNOLOGY * PROPRIETARY INFORMATION * FIFO: FIFO Control MACH Engineer: DLR Product: PCI MPEG Board Part Number: xxx-xxxx-xxxx Revision 7.0 10-23-95 Copyright PLX Technology, 1995 ’ "device declaration fifo device ’MACH220A’;


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    mach220a0x06f60xe45d0xe422+50xe4420xeb25clk25sti3400connector h20 PDF

    L1239

    Abstract: l0728 l0312 SGS L282 L0936 L11616 L9960 0x00000404 L1198 L1322
    Contextual Info: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _


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    9060/mpegl1239l0728l0312+7sgs l282l0936l11616l99600x00000404l1198l1322 PDF

    Contextual Info: HI-6130 / HI-6131 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • Two options are offered for host access to internal registers and static RAM: The HI-6130 uses a 16-bit parallel bus; the HI-6131 communicates with the host


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    hi-6130hi-6131mil-std-1553mil-std-1760+216-bit100-pin PDF

    IRIG B generator

    Abstract: lm 16151 HI-6131 HI-6130 DS6130 pin diagram for IC 1619 30 pin HI-6132 TT32 digital timer IRIG B 122 generator 0x02FE
    Contextual Info: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains


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    hi-6130hi-6131hi-6132mil-std-1553+12mil-std-176016-bit48bitirig106irig-106irig b generatorlm 16151ds6130pin diagram for ic 1619 30 pintt32 digital timeririg b 122 generator0x02fe PDF

    Contextual Info: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains


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    hi-6130hi-6131hi-6132mil-std-1553+3mil-std-1760hi-613xmil-std-1553b PDF

    L0936

    Abstract: l0728 L1239 L0988 L9960 l0312 l0832 L4204 l0416 L9804
    Contextual Info: module busctl title ’ PLX TECHNOLOGY * PROPRIETARY INFORMATION * BUSCTL: Local Bus Control MACH Engineer: DLR Product: PCI MPEG Board Part Number: xxx-xxxx-xxxx Revision 3.0 10-20-95 Copyright PLX Technology, 1995 ’ "device declaration


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    mach220a0xe60b0x350bsti3400+16sti4500pci906016-bit0x2043v0166v0167l0936l0728l1239l0988l9960l0312l0832l4204l0416l9804 PDF

    la2 d2 timer

    Abstract: L0936 Header 13X2 l0728 PIN DIAGRAM OF IC LM7805 U0202 L9960 STI3400 L1239 L4204
    Contextual Info: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PLX Technology SGS PCI MPEG Board Engineering Changes 07/15/96 1. The PCI9060 always reads long words, even when the local bus is configured for 16-bits. Modify the BUSCTL


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    pci906016-bitsla2 d2 timerl0936+8header 13x2l0728pin diagram of ic lm7805u0202l9960sti3400l1239l4204 PDF

    Contextual Info: HI-6130 / HI-6131 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • Two options are offered for host access to internal registers and static RAM: The HI-6130 uses a 16-bit parallel bus; the HI-6131 communicates with the host


    Original
    hi-6130hi-6131mil-std-1553mil-std-1760+216-bit100-pin PDF

    Contextual Info: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains


    Original
    hi-6130hi-6131hi-6132mil-std-1553+3mil-std-1760hi-613xmil-std-1553b PDF

    Contextual Info: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains


    Original
    hi-6130hi-6131hi-6132mil-std-1553+3mil-std-1760hi-613xmil-std-1553b PDF

    L0936

    Abstract: L0988 L9960 L1239 STI3400 L1462 E442 L1105 L3216 U0601
    Contextual Info: Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _ General Description _ Features_


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    9060/mpegl0936l0988l9960+7l1239sti3400l1462e442l1105l3216u0601 PDF

    IRIG B generator

    Abstract: HI-6131 IRIG B 122 generator lm 16151 IRIG-106 BT 2323 M ic pin configuration 80HEX Holt 1553 Controller HI6110 mc16 TSR16
    Contextual Info: HI-6130 / HI-6131 / HI-6132 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • The 3.3V CMOS HI-613x device provides a complete single- or multi-function interface between a host processor and MIL-STD-1553B bus. Each IC contains


    Original
    hi-6130hi-6131hi-6132mil-std-1553+13mil-std-176016-bit48bitirig106irig-106irig b generatoririg b 122 generatorlm 16151bt 2323 m ic pin configuration80hexholt 1553 controller hi6110mc16tsr16 PDF