0X18000 Search Results

AD5754R

Contextual Info: Complete, Quad, 14-/16-Bit, Serial Input, Unipolar/Bipolar Voltage Output DACs AD5734R/AD5754R FEATURES GENERAL DESCRIPTION Complete, quad, 14-/16-bit DACs Operates from single/dual supplies Software programmable output range +5 V, +10 V, +10.8 V, ±5 V, ±10 V, ±10.8 V

Contextual Info: 32bit TX System RISC TX19 family TMP1942FDU/XBG Rev1.0 March 29, 2007 TMP1942FD 32-Bit RISC Microprocessor TX19 Family TMP1942FDU/FDXBG 1. Features The TX19 is a family of high-performance 32-bit microprocessors that offers the speed of a 32-bit RISC solution with the added advantage of a significantly reduced code size of a 16-bit architecture.

TMS320DM357

Contextual Info: TMS320DM357 DVEVM v2.05 Getting Started Guide Literature Number: SPRUGH0 December 2008 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any

7SDMM-B0-2211-A

Abstract: 980020-48-P2 mt29f2g08aadwp connector 7sdmm-b0-2211 MT29F8G08AAAWP MT29F8G08A MT29F2G08AAD BSS138 NXP 7SDMM 7SDMM-B0-2211
Contextual Info: SCH-VAL314x-01 00 NXP Semiconductors LPC314x Validation Board Schematics 1 05 Review cleanup and Layout quotation 07/20/08 01 REFDES re-ordered; Release for Assembly 08/14/08 02 Corrected EBI Static nCS1 Addrs Space table, sht 13 10/16/08 03 Change pull-up value on GPIO0, GPIO1

980020-48-P2

Abstract: 7SDMM-B0-2211-A MT29F8G08AAAWP mt29f2g08aadwp MT29F8G08A 7SDMM-B0-2211 MT29F2G08AAD 7SDMM MT29F4G08ABCWC MT29F4G08ABCWC-et
Contextual Info: SCH-VAL313x-01 01 NXP Semiconductors LPC313x Validation Board Schematics 1 05 Initial release 09/29/08 02 Corrected EBI Static nCS1 Addrs Space table, sht 13 10/16/08 03 Change pull-up value on GPIO0, GPIO1 & GPIO2 to 4.7k; sht 7 01/22/09 04 Tie LPC313x pin K11 to SUP3;

Contextual Info: ARM-based Embedded MPU SAM9G35 DATASHEET Description The SAM9G35 is a member of the Atmel series of 400 MHz ARM926EJ-S embedded MPUs that support high bandwidth communication and advanced user interfaces and are optimized for industrial applications such as building automation,

Contextual Info: Application Note SAMA5D3 Xplained Getting Started ARM-based Embedded MPU ED AIN XPL 3 5D MA SA Scope This document explains how to get started quickly with your SAMA5D3 Xplained board. It provides details on how to connect the SAMA5D3 Xplained board to a computer and

SA24C1024

Abstract: Up To Date CMOS 4000 Data Comparison Tables M08D SA24C1024E SA24C1024LZ
Contextual Info: Features •= •= •= •= •= •= •= •= •= •= •= Saifun NROM NVM Technology Operating voltage: 2.7V to 3.6V Clock frequency: 100/400/1700/3400 kHz Low power consumption 0.5µ µA standby current typical L version <0.2µ µA standby current typical (LZ version)

ROUND ROBIN ARBITRATION AND FIXED PRIORITY SCHEME

Abstract: RC334 0X00FF0000
Contextual Info: Software Configuration of PCI Bridge on RC32334 Integrated Processor Notes Technical Note TN-45 By Harpinder Singh Intr Introduction This technical note describes the steps requires to initialize the PCI bridge on the RC32334. Specifically, this includes some example code as to how to initialize the device to support a host mode configuration,

tag a2

Abstract: ARGB888 CY7C68013A ITU656 RGB565 RGB888 ECP2-50 RGB-16 802.3 CRC32
Contextual Info: LCD-Pro IP user manual UM0011 v1.0 – 14 July 2009 User Manual: Overview This document describes the LCD-Pro IP architecture, including the next cores: UltiEVC display controller, UltiEBB 2D graphic accelerator, UltiEMC DDR memory controller, UltiVidin video input core, UltiDMA DMA controller, UltiSPI2AHB SPI

renesas tcam

Abstract: tcam renesas idt tcam Ayama 20000 cypress tcam Sahasra 50000 NSE sahasra Sahasra 50000 tcam tcam cypress
Contextual Info: CYNSE20512 CYNSE20256 PRELIMINARY Ayama 20000 Network Search Engine Family Data Sheet Features — QDR-II up to 250 MHz, Burst-of-2 and Burst-of-4 — Convenient “Clamshellable” pinout for ease of board design • Fast search rates — Up to 266 million searches per second MSPS in

82599EN

Contextual Info: Intel 82599 10 GbE Controller Datasheet Networking Division ND PRODUCT FEATURES General                                  Dual port 10 GbE device or Single Port device (82599EN)

71M6543GT/71M6543GHT

Contextual Info: EVALUATION KIT AVAILABLE 71M6543FT/71M6543HT/ 71M6543GT/71M6543GHT General Description The 71M6543FT/71M6543HT/71M6543GT/71M6543GHT 71M654xT are 4th-generation three-phase metering systems-on-chips (SoCs) with a 5MHz, 8051-compatible MPU core, low-power RTC with digital temperature

STR W 5453 A

Abstract: STR W 5453 AX07CF192 AX07CF192-100 I6I15 ARM processor based Circuit Diagram splitter circuit
Contextual Info: AX07CF192 32-Bit Embedded Flash MCU User’s Manual Preliminary Aeroflex Microelectronic Solutions 4350 Centennial Blvd. Colo. Spgs., CO 80907 www.aeroflex.com January, 2003 Aeroflex Microelectronic Solutions Sales Offices Main Office 4350 Centennial Blvd.

S1C17564

Abstract: hx 630 S1C17 S1C17554 high power thyristor REGULATOR IC 7812 SMD
Contextual Info: CMOS 16-BIT SINGLE CHIP MICROCONTROLLER S1C17554/564 Technical Manual Rev.1.0 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability

S1C17705

Abstract: S5U1C17001C S1C17
Contextual Info: CMOS 16-BIT SINGLE CHIP MICROCOMPUTER S1C17705 Technical Manual Rev.1.0 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability

S1C33000

Abstract: S1C33L01 E0C33202 E0C33204 E0C33208 E0C33A104 EPOD332128
Contextual Info: MF1097-03 CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33000 Core CPU Manual NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any

bv228

Abstract: S1C33210 S1C33L01 MF1517-01 CP4D
Contextual Info: MF1517-01 CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33210 Technical Manual S1C33210 PRODUCT PART S1C33210 FUNCTION PART NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.

netxtreme programmer

Abstract: BCM5701 PG105R S6D0 netxtreme 57xx gigabit controller BCM5704 BCM5715 broadcom BCM5715C BCM5788/M mac 7a8 transistor
Contextual Info: Programmer’s Guide BCM57XX Host Programmer Interface Specification for the NetXtreme Family of Highly Integrated Media Access Controllers 57XX-PG105-R 5300 California Avenue • Irvine, CA 92617 • Phone: 949-926-5000 • Fax: 949-926-5203 01/29/08 BCM57XX

HY29F800T

Abstract: PSOP 44 Pattern HY29F800B
Contextual Info: HY29F800 8 Megabit 1Mx8/512Kx16 , 5 Volt-only, Flash Memory KEY FEATURES n 5 Volt Read, Program, and Erase – Minimizes system-level power requirements n High Performance – Access times as fast as 55 ns n Low Power Consumption – 20 mA typical active read current in byte

Contextual Info: HY29LV400 4 Mbit 512K x 8/256K x 16 Low Voltage Flash Memory KEY FEATURES n Single Power Supply Operation n n n n n n n n – Read, program and erase operations from 2.7 to 3.6 volts – Ideal for battery-powered applications High Performance – 70 and 90 ns access time versions for full

circuit diagram for micro controller based caller

Abstract: the nios ii processor reference handbook 128 bit processor schematic lauterbach JTAG Programmer Schematics lauterbach JTAG Schematics ARM interface LCD Module Date Codes Explained transistor DATA REFERENCE handbook NII51001-10 NII51002-10 NII51003-10
Contextual Info: Section I. Nios II Processor Design This section provides information about the Nios II processor. This section includes the following chapters: July 2010 • Chapter 1, Introduction ■ Chapter 2, Processor Architecture ■ Chapter 3, Programming Model

AD5754RBREZ

Abstract: 06465 AD5724R
Contextual Info: Complete, Quad, 12-/14-/16-Bit, Serial Input, Unipolar/Bipolar Voltage Output DACs AD5724R/AD5734R/AD5754R FEATURES GENERAL DESCRIPTION Complete, quad, 12-/14-/16-bit DACs Operates from single/dual supplies Software programmable output range +5 V, +10 V, +10.8 V, ±5 V, ±10 V, ±10.8 V

chilled water system

Contextual Info: Data Sheet, Revision 3 September 21, 2005 TSI-2 2k x 2k Time-Slot Interchanger 1 Introduction The last issue of this data sheet was August 31, 2005. A change history is included in Section 11 Change History on page 61. Red change bars have been installed on all text, figures, and tables that were added or changed. All changes to the text