0X04E Search Results

atxmega128B

Abstract: 141-003 0x0D00 XMEGA Application Notes
Contextual Info: 8/16-bit Atmel XMEGA B1 Microcontroller ATxmega128B1; ATxmega64B1 Features  High-performance, low-power Atmel AVR® XMEGA® 8/16-bit Microcontroller  Nonvolatile program and data memories          64K - 128KBytes of in-system self-programmable flash

CY7C09449PVA-AC

Abstract: 8c04 i486 PC MOTHERBOARD CIRCUIT diagram
Contextual Info: CY7C09449PVA-AC 128 Kb Dual-Port SRAM with PCI Bus Controller PCI-DP Features Functional Overview • 128 Kb of dual-ported shared memory ■ Master and target PCI Specification 2.2 compliant interface ■ Embedded host bridge capability ■ Direct interface to many microprocessors

Contextual Info: XR21V1410 1-CH FULL-SPEED USB UART JULY 2013 REV. 1.3.1 GENERAL DESCRIPTION The XR21V1410 V1410 is an enhanced Universal Asynchronous Receiver and Transmitter (UART) with a USB interface. The USB interface is fully compliant to Full Speed USB 2.0 specification that supports 12

Contextual Info: SLWS137A GC3021A 3.3V MIXER AND CARRIER REMOVAL CHIP DATASHEET October 2002 This datasheet contains information which may be changed at any time without notice. GC3021A 3.3V MIXER AND CARRIER REMOVAL CHIP SLWS137A REVISION HISTORY This datasheet is revised from the GC3021 datasheet to reflect the changes in the GC3021A replacement.

0xf801

Abstract: 0xf852
Contextual Info: SLWS137A GC3021A 3.3V MIXER AND CARRIER REMOVAL CHIP DATASHEET October 2002 This datasheet contains information which may be changed at any time without notice. GC3021A 3.3V MIXER AND CARRIER REMOVAL CHIP SLWS137A REVISION HISTORY This datasheet is revised from the GC3021 datasheet to reflect the changes in the GC3021A replacement.

Contextual Info: DAC1653Q/DAC1658Q Quad 16-bit DAC: 10 Gbps JESD204B interface: x2, x4 and x8 interpolating Advance data sheet Revision 2.3.1 1. GENERAL DESCRIPTION DAC1653Q and DAC1658Q are high-speed, high-performance 16-bit quad channel Digital-to-Analog Converters DACs .

XR21V1414IM48-F

Contextual Info: XR21V1414 4-CH FULL-SPEED USB UART APRIL 2012 GENERAL DESCRIPTION The XR21V1414 V1414 is an enhanced 4-channel USB Universal Asynchronous Receiver and Transmitter (UART). The USB interface is fully compliant to Full Speed USB 2.0 specification that supports 12 Mbps USB data transfer rate. The USB

charmilles d10

Abstract: IP2022-120 IP2022/PQ80 RB1 Wlan Cardbus IP2012-120 RC728 ip2k Ubicom IP2000 IP2022
Contextual Info: PRELIMINARY March 17, 2003 IP2012 / IP2022 Wireless Network Processors Features and Performance Optimized for Network Connectivity Product Highlights The Ubicom IP2012 and IP2022™ Wireless Network Processors combine support for communication physical

TMS320C25

Abstract: TMS320C26 TMS320 TMS32020 SPRU014 7a89 T1C 106D
Contextual Info: TMS320C2x C Source Debugger User’s Guide 2563458-9721 revision A March 1991 important notice Texas Instruments Incorporated TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to

32KHZ

Abstract: 82077AA MPU-401 PC99
Contextual Info: LPC47B27x 100 Pin Enhanced Super I/O Controller with LPC Interface FEATURES • • • • • • • • • • • • • • • • 3.3 Volt Operation, 5 Volt Tolerant LPC Interface Fan Control Fan Speed Control Outputs 2 Fan Tachometer Inputs (2)

82077AA

Abstract: LPC47M120 LPC47M120-MC NS16C550 PC99 spindle and VCM motor controller 0x04E "USB Token" 1997 ACE 12075
Contextual Info: LPC47M120 PRELIMINARY Legacy Reduced Super I/O with USB Hub FEATURES § 3.3 Volt Operation, 5 volt Tolerant § § LPC Interface − Multiplexed Command, Address and Data Bus − Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems PC98, PC99 Compliant

sandisk eMMC 4.41

Abstract: toshiba emmc 4.4 spec SANDISK inand Samsung eMMC 4.41 sandisk emmc 4.5 bcm 4330 programming Guide Sandisk iNAND eMMC toshiba emmc 4.4 linux toshiba emmc 4.4.1 spec sandisk inand extreme emmc
Contextual Info: An addendum for this document is available. See Document ID#: IMX25RMAD. i.MX25 Multimedia Applications Processor Reference Manual Supports i.MX251 MCIMX251 i.MX253 (MCIMX253) i.MX255 (MCIMX255) i.MX257 (MCIMX257) i.MX258 (MCIMX258) IMX25RM Rev. 1 06/2009

paladin 172 410

Contextual Info: 09 :3 1: 26 PM S/UNI IMA 4 Telecom Standard Product Data Sheet Released ,2 7M ar ch ,2 00 8 PM7348 In co n Th ur sd ay S/UNI IMA 4 Datasheet Proprietary and Confidential Released Issue No. 3: March 2008 Do wn lo ad ed [c on tro lle d] by Co nt en tT ea m of

Contextual Info: XE1431 Bluetooth SoC VREGA RC Oscillator VREGD] Power Management VDDBAT VREF Memory VREG_OFF Boot Loader Bluetooth Sequencer MOSI CPU NSS[4:0] RADIO SPI ROM SCK radio inputs Interface radio outputs MISO VMIC_P VMIC_N NRESET CODEC PA[7:0] GPIO/UART PB[7:0]

intel 8086 assembly language

Abstract: 82077AA NS16C550 PC01 PC99 SIO10N268 SIO10N268-NE SIO10N268-NU CR331 GP126
Contextual Info: SIO10N268 Advanced Notebook I/O for ISA or LPC Designs with X-Bus Interface for I/O, Memory, and FWH Emulation and Four Serial Ports Datasheet Product Features • 3.3 Volt Operation 5 Volt Tolerant • PC99, PC01, ACPI 1.0 Compliant • LPC or ISA Interface

SPRU019A

Abstract: tms320c26 113A CMOS TMS320C26 schematic TMS320 TMS32020 TMS320C25 books National Semiconductor
Contextual Info: \ TMS320C2x C Source Debugger Microprocessor Development Systems 2563458–9761 revision A SPRU070 TMS320C2x C Source Debugger User’s Guide 2563458-9721 revision A March 1991 TMS320C2x C Source Debugger Reference Card Phone Numbers TI Customer Response Center

D108051

Abstract: LPC47N350-NE lpc47n350-nu delta dps 298 cp mbx 171 rev 1.0 lm7412 ps2 CIRCUIT power diagram motherboard 993 AN rv13
Contextual Info: LPC47N350 Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface Datasheet Product Features • ■ ■ ■ ■ ■ ■ ■ ■ 3.3V Operation with 5V Tolerant Buffers ACPI 2.0 PC2001 Compliant LPC Interface with Clock Run Support — Decode I/O, Memory, and FWH cycles

transistor cd 4400

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disadvantage of numeric water level indicator

Contextual Info: Dual/Quad Input Network Clock Generator/Synchronizer AD9547 FEATURES APPLICATIONS Supports Stratum 2 stability in holdover mode Supports reference switchover with phase build-out Supports hitless reference switchover Automatic/manual holdover and reference switchover

5.1 home theatre circuit diagram

Abstract: 2.1 to 5.1 home theatre circuit diagram 5.1 home theatre basic diagram 5.1 home theatre diagram zigbee document 053474r06 version 1.0 5.1 home theatre assembling 4.1 home theater ic ZigBee Specification, Document 053474r06 home theater 5.1 circuit diagram bd 317 schema
Contextual Info: ZigBee Specification ZigBee Document 053474r06, Version 1.0 December 14th, 2004 Sponsored by: ZigBee Alliance Accepted by ZigBee Alliance Board of Directors. Abstract The ZigBee Specification describes the infrastructure and services available to applications operating on the ZigBee platform.

Contextual Info: LPC47M10x 100 Pin Enhanced Super I/O Controller with LPC Interface for Consumer Applications FEATURES • • • • • • • • • • • • • • • 3.3 Volt Operation 5 Volt Tolerant LPC Interface ACPI 1.0 Compliant Fan Control Fan Speed Control Outputs

Contextual Info: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. MCF5307 ColdFire Integrated Microprocessor User’s Manual MCF5307UM/D Rev. 2.0, 08/2000 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. ColdFire is a registered trademark and DigitalDNA is a trademark of Motorola, Inc.

Contextual Info: Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator AD9559 Data Sheet FEATURES Pin program function for easy frequency translation configuration Software controlled power-down 72-lead 10 mm x 10 mm LFCSP package Supports GR-1244 Stratum 3 stability in holdover mode

FEC 0642 RoHS

Abstract: AD9584 lfcsp_VQ package 0E-18 06d6 06AC
Contextual Info: Quad/Octal Input Network Clock Generator/Synchronizer AD9548 FEATURES APPLICATIONS Supports Stratum 2 stability in holdover mode Supports reference switchover with phase build-out Supports hitless reference switchover Auto/manual holdover and reference switchover