0X02A0 Search Results

VTXP-6

Abstract: TXC-06951 g803 Motorola 0X69 TXC-06951-MB 98822
Contextual Info: VTXP-6 Device STM-1/STS-3 SDH/SONET TU/VT Processor and Cross Connect TXC-06951 DATA SHEET PRELIMINARY TXC-06951-MB, Ed. 5 March 2006 FEATURES APPLICATIONS • Supports two line ports using the standard byte wide 19.44 MHz Telecom Bus, or a single line port using the standard byte wide 77.76 MHz Telecom Bus.

transistor marking WC 2C

Abstract: E22/6/AS7620/TMS320C6678/AS7620/NZT6728-datasheet
Contextual Info: TMS320C6678 SPRS691E—November 2010—Revised March 2014 Multicore Fixed and Floating-Point Digital Signal Processor Check for Evaluation Modules EVM : TMS320C6678 1 TMS320C6678 Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x

Contextual Info: 66AK2E05, 66AK2E02 SPRS865B—June 2013—Revised January 2014 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 66AK2E05/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz

circuit diagram for 7.1 home theatre amplifier

Abstract: simple 5.1 home theatre amplifier circuit diagram with usb philips home theatre tea7000 5.1 home theatre audio system diagram for making 7.1 home theatre schematic diagram SmD TRANSISTOR 1fs circuit schematic for wireless headphone with mic schematic diagram of bluetooth headphone circuit for 7.1 home theatre system
Contextual Info: SAA8200HL Ensation Base integrated wireless audio baseband Rev. 02 — 17 October 2005 Preliminary data sheet 1. General description The Ensation Base, SAA8200HL, is part of the integrated wireless audio system chip set offered by Philips. This chip set enables the development of low cost wireless digital audio

Contextual Info: MC9S12XDP512 Data Sheet HCS12X Microcontrollers MC9S12XDP512 Rev. 2.10 5/2005 freescale.com MC9S12XDP512 Data Sheet covers MC9S12XDT384 & MC9S12XA512 MC9S12XDP512V2 Rev. 2.10 5/2005 To provide the most up-to-date information, the revision of our documents on the World Wide Web will be

Contextual Info: MC9S12XDP512 Data Sheet HCS12X Microcontrollers MC9S12XDP512 Rev. 2.09 5/2005 freescale.com MC9S12XDP512 Data Sheet covers MC9S12XDT384 & MC9S12XA512 MC9S12XDP512V2 Rev. 2.09 5/2005 To provide the most up-to-date information, the revision of our documents on the World Wide Web will be

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

TMS320C6678ACYP

Abstract: TMS320C6678CYP TMS320C6678XCYP TMS320C6678CYPA TMS320C6678XCYPA
Contextual Info: TMS320C6678 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not

7813 Texas Instruments Transistor

Abstract: TMS320C6000 TMS320C6474 C6000 C6474 C64X DDR2-667 SPRS552H BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

DFSDM

Abstract: SAM9M10 K 2141 AC97 ARM926EJ-S AT91SAM ISO7816 NBC 3111 hc 541 rfid reader id-20
Contextual Info: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static

Contextual Info: AM5K2E04, AM5K2E02 SPRS864B—June 2013—Revised January 2014 Multicore ARM KeyStone II System-on-Chip SoC 1 AM5K2E04/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz – 4MB L2 Cache Memory Shared by all Cortex-A15

transistor d880

Abstract: BR17
Contextual Info: TMS320C6474 www.ti.com SPRS552E – OCTOBER 2008 – REVISED APRIL 2010 TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

Contextual Info: AM5K2E04, AM5K2E02 SPRS864B—June 2013—Revised January 2014 Multicore ARM KeyStone II System-on-Chip SoC 1 AM5K2E04/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz – 4MB L2 Cache Memory Shared by all Cortex-A15

TMS320TCI6608

Abstract: SPRS623A SPRS623B
Contextual Info: TMS320TCI6608 Multicore Fixed and Floating-Point Digital Signal Processor Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not

Contextual Info: TMS320DM647 TMS320DM648 Digital Media Processor www.ti.com SPRS372D – MAY 2007 – REVISED APRIL 2009 1 TMS320DM647, TMS320DM648 Digital Media Processor 1.1 Features • • • High-Performance Digital Media Processor – 720-MHz, 800-MHz, 900-MHz C64x+ Clock

Contextual Info: TE X AS INS TRUM E NTS - ADVANCE INFO R MAT ION Tiva TM4C1292NCZAD Microcontroller D ATA SH E E T D S -T M 4C 1292 NCZ A D- 1 5 6 3 8 . 2 7 11 S P M S 432 C o p yri g h t 2 0 07-2013 Te xa s In stru me n ts In co rporated Copyright Copyright © 2007-2013 Texas Instruments Incorporated. Tiva and TivaWare are trademarks of Texas Instruments Incorporated. ARM and Thumb are

SPRS836D

Contextual Info: TCI6638K2K SPRS836D—February 2012—Revised October 2013 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 TCI6638K2K Features and Description 1.1 Features • Eight TMS320C66x DSP Core Subsystems (C66x CorePacs), Each With – 1.0 GHz or 1.2 GHz C66x Fixed/Floating-Point DSP Core

TM4C129LNCZAD

Contextual Info: TE X AS INS TRUM E NTS - ADVANCE INFO R MAT ION Tiva TM4C129LNCZAD Microcontroller D ATA SH E E T D S -T M 4C 129L NCZ A D- 1 5 6 3 8 . 2 7 11 S P M S 443 C o p yri g h t 2 0 07-2013 Te xa s In stru me n ts In co rporated Copyright Copyright © 2007-2013 Texas Instruments Incorporated. Tiva and TivaWare are trademarks of Texas Instruments Incorporated. ARM and Thumb are

Contextual Info: AM5K2E04/02 Multicore ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products

5m48h

Abstract: S12XEP100 MC9S12XEP7682 xnor* Freescale S12XEP100 hcs12 moda modb xgate 5m48h 2M53 S12XES384 3M25J 9S12XEG128 MC9S12XEQ512 XEG128
Contextual Info: HCS12X Microcontrollers MC9S12XEP100RMV1 Rev. 1.19 12/2008 freescale.com Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010: S12XE products in 208 MAPBGA packages

Contextual Info: TE X AS INS TRUM E NTS - ADVANCE INFO R MAT ION Tiva TM4C1292NCPDT Microcontroller D ATA SH E E T D S -T M 4C 1292 NCP DT - 1 5 6 3 8 . 2 7 11 S P M S 431 C o p yri g h t 2 0 07-2013 Te xa s In stru me n ts In co rporated Copyright Copyright © 2007-2013 Texas Instruments Incorporated. Tiva and TivaWare are trademarks of Texas Instruments Incorporated. ARM and Thumb are

National Semiconductor PC16550D UART

Abstract: K2687 CL-GD5465 VR5000 PC16550D R5000 VRC5074 R4311 H49-M97 CL-GD546
Contextual Info: VRC5074 System Controller June 1998 Data Sheet 1.0 Introduction 1.1 The VRC5074 System Controller is a software-configurable chip that directly connects the V R5000 CPU to SDRAM memory, a PCI Bus, and a Local Bus, without external logic or buffering. From the CPU’s viewpoint, the controller acts as a memory controller, DMA controller, PCI-Bus host bridge, and Local-Bus host bridge. From the viewpoint of PCI agents, the controller acts as master and target on the PCI Bus. The

Contextual Info: 66AK2H12/06 Multicore DSP+ARM KeyStone II System-on-Chip SoC Data Manual PRODUCT PREVIEW information applies to products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products

BOSCH ME 7.8.8

Contextual Info: Freescale Semiconductor MPC5604BCRM Rev. 8.2, 09/2013 MPC5604B/C Microcontroller Reference Manual This is the MPC5604B/C Reference Manual set consisting of the following files: • MPC5604B/C Reference Manual Addendum MPC5604B/CRMAD , Rev. 2 • MPC5604B/C Reference Manual (MPC5604B/CRM), Rev. 8