0X00180 Search Results

AT91SAM3U4

Abstract: at91sam3 1N1308 MAR 735 REGULATOR IC 7912 pin identify AT91SAM3U4E SAM3u1 AT91SAM3U 3961 G.E 0x20180
Contextual Info: Features • Core • • • • • • – ARM Cortex®-M3 revision 2.0 running at up to 96 MHz – Memory Protection Unit MPU – Thumb®-2 instruction set Memories – From 64 to 256 Kbytes embedded Flash, 128-bit wide access, memory accelerator,

OMAP3630

Contextual Info: SN65LVDS311 www.ti.com SLLSE31 – MAY 2010 PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER Check for Samples: SN65LVDS311 FEATURES 1 • • • • • • • • • 2.8 x 2.8mm package size 1.8V input signal swing 24-Bit RGB Data, 3 Control Bits, 1 Parity Bit

Contextual Info: Freescale Semiconductor Advanced Information Document Number: MM912F634 Rev. 7.0, 5/2013 Integrated S12 Based Relay Driver with LIN MM912F634 48-PIN LQFP-EP, 7.0 mm x 7.0 mm AE SUFFIX: Exposed Pad Option The MM912F634 is an integrated single package solution that

82599EN

Contextual Info: Intel 82599 10 GbE Controller Datasheet Networking Division ND PRODUCT FEATURES General                                  Dual port 10 GbE device or Single Port device (82599EN)

netxtreme programmer

Abstract: BCM5701 PG105R S6D0 netxtreme 57xx gigabit controller BCM5704 BCM5715 broadcom BCM5715C BCM5788/M mac 7a8 transistor
Contextual Info: Programmer’s Guide BCM57XX Host Programmer Interface Specification for the NetXtreme Family of Highly Integrated Media Access Controllers 57XX-PG105-R 5300 California Avenue • Irvine, CA 92617 • Phone: 949-926-5000 • Fax: 949-926-5203 01/29/08 BCM57XX

subwoofer schematic circuit for car audio

Abstract: CS493264 AN163 schematic diagram surround sony cdb493 CS493XX cirrus an163 CS493263 CS493264-CL CS4932X
Contextual Info: CS49300 Family DSP Multi-Standard Audio Decoder Family Features Description z CS4930X: DVD Audio Sub-family The CS493XX is a family of multichannel audio decoders intended to supersede the CS4923/4/5/6/7/8/9 family as the leader of audio decoding in both the DVD, broadcast and

Contextual Info: SN65LVDS308 www.ti.com SLLS835 – MAY 2007 PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL RECEIVER FEATURES • • • • • • • • • • • FlatLink 3G Serial Interface Technology Compatible With FlatLink 3G Transmitters Such as SN65LVDS307 Supports Video Interfaces up to 24-Bit RGB

Contextual Info: SN65LVDS307 www.ti.com SLLS834 – MAY 2007 PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL TRANSMITTER FEATURES • • • • • • • • • • • • FlatLink 3G Serial-Interface Technology Compatible With FlatLink™3G Receivers Such as SN65LVDS308 Input Supports Video Interfaces up to 24-Bit

Contextual Info: 1200 MHz to 2400 MHz Quadrature Modulator with 1550 MHz to 2150 MHz Frac-N PLL and Integrated VCO ADRF6702 dynamic range and linearity. The integration of the IQ modulator, PLL, and VCO provides for significant board savings and reduces the BOM and design complexity.

0F80b

Abstract: EM2800 00EM7 IC L1117 PED20 a141 ddx he nv bm10 es2 3024 1B812 C901
Contextual Info: Tri Core 16-Bit Digital Signal Processor MSC8113RM Rev 0, May 2008 Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010:i.MX Product Family, DragonBall Product Family

ATMEL 24C512

Abstract: TM3260 ATmel 750 24c04 trimedia tm3260 24C512 atmel 24c04 CR 6562 NTSC/PAL to RGB/VGA Encoding atmel 24c256 data sheet DATA SHEET 24C256
Contextual Info: PNX15xx Series Data Book Volume 1 of 1 Connected Media Processor Rev. 2 — 1 December 2004 PNX15xx Series Philips Semiconductors Volume 1 of 1 Connected Media Processor Table of Contents Chapter 1: Integrated Circuit Data 1. 2. 2.1 2.2 2.3 2.3.1 2.3.2 3.

DB16 connector

Abstract: DB17 connector male PAB1 ADRF6601 ADRF6602 ADRF6603 DB10 DB21 DB3 C22 DB15 MALE TO DB9 FEMALE
Contextual Info: 1550 MHz to 2150 MHz Rx Mixer with Integrated Fractional-N PLL and VCO ADRF6602 The PLL can support input reference frequencies from 12 MHz to 160 MHz. The PFD output controls a charge pump whose output drives an off-chip loop filter. FEATURES Rx mixer with integrated fractional-N PLL

bfp760

Abstract: ADSP-TS201 reverse carry addition WPCT ADSP-21263 C-15 ts101 dsp application note boot kernel for the ADSP-21369 xr120xddddcccc "vector instructions" saturation
Contextual Info: ADSP-TS201 TigerSHARC Processor Programming Reference Revision 1.1, April 2005 Part Number 82-000810-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2005 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express

MB87P2020

Abstract: MB87J2120 MB91360 SAA7111
Contextual Info: Cremson Graphic Controller Family Modular Starterkit User’s Manual for board configuration MB91F361/2 CPU-Module + MB87J2120 ‘Lavender’ or MB87P2020 ‘Jasmine’  Fujitsu Microelectronics Europe GmbH Vers. 1.0 page -1- Warrenty and Disclaimer To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH

723 ic

Abstract: g723 pdf working OF IC 723 IC 723 DSP56800E DSP56852 DSP56858 G.723 codec 8 channel acelp 7231a
Contextual Info: Freescale Semiconductor, Inc. ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005 Freescale Semiconductor, Inc. ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005 Embedded SDK Software Development Kit G.723.1A Speech Codec Library SDK138/D Rev. 1, 07/19/2002 Motorola, Inc., 2002. All rights reserved.

DB15 MALE TO DB9 FEMALE

Abstract: DB23 Female D-SUB CONNECTOR DB14 connector male DB17 connector male AMP745781-4 DB15 connector male PAB1 TC1-1-13 9pin adapter db15 female to usb
Contextual Info: 2500 MHz to 2900 MHz Rx Mixer with Integrated Fractional-N PLL and VCO ADRF6604 The PLL reference input can support input frequencies from 12 MHz to 160 MHz. The PFD output controls a charge pump whose output drives an off-chip loop filter. FEATURES Rx mixer with integrated fractional-N PLL

Contextual Info: D S "#$%&&'' fido11000 ATA HEET Flexible Input Deterministic Output (fido) 32-bit Real-Time Microcontroller with Configurable Peripherals DATA SHEET Version 9.4, March 2007 1 MARCH 2007, REV 9.4 DATA SHEET fido11000 2 MARCH 2007, REV 9.4 DATA SHEET fido11000

AMBA AXI to APB BUS Bridge verilog code

Abstract: AMBA AXI 3 to APB BUS Bridge verilog code AMBA APB bus protocol PL341 state diagram of AMBA AXI protocol v 1.0 ARM DUI 0333
Contextual Info: PrimeCell DDR2 Dynamic Memory Controller PL341 Revision: r0p0 Technical Reference Manual Copyright 2007 ARM Limited. All rights reserved. ARM DDI 0418A PrimeCell DDR2 Dynamic Memory Controller (PL341) Technical Reference Manual Copyright © 2007 ARM Limited. All rights reserved.

BT8233EHFB

Abstract: 5969b l8233
Contextual Info: R O C K W E L L Network access S E M I C O N D U C T O R Bt8233 ATM ServiceSAR with S Y S T E M S xBR Traffic Management datasheet PROVIDING HIGH SPEED MULTIMEDIA CONNECTIONS September 1998 Bt8233 ATM ServiceSAR with xBR Traffic Management The Bt8233 Service Segmentation and Reassembly Controller integrates in a single

Contextual Info: 1000 MHz to 3100 MHz Rx Mixer with Integrated Fractional-N PLL and VCO ADRF6602 Data Sheet FEATURES The PLL can support input reference frequencies from 12 MHz to 160 MHz. The PFD output controls a charge pump whose output drives an off-chip loop filter. Rx mixer with integrated fractional-N PLL

sublvds TX

Abstract: SN65LVDS307 SN65LVDS308 sublvds
Contextual Info: SN65LVDS308 www.ti.com SLLS835 – MAY 2007 PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL RECEIVER FEATURES • • • • • • • • • • • FlatLink 3G Serial Interface Technology Compatible With FlatLink 3G Transmitters Such as SN65LVDS307 Supports Video Interfaces up to 24-Bit RGB

T0250

Abstract: SN65LVDS307 SN65LVDS308 B0237 T0-2-49 0x00000F1 S0263-01 TGS 810
Contextual Info: SN65LVDS307 www.ti.com SLLS834 – MAY 2007 PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL TRANSMITTER FEATURES • • • • • • • • • • • • FlatLink 3G Serial-Interface Technology Compatible With FlatLink™3G Receivers Such as SN65LVDS308 Input Supports Video Interfaces up to 24-Bit

B0237

Contextual Info: SN65LVDS307 www.ti.com SLLS834 – MAY 2007 PROGRAMMABLE 27-BIT PARALLEL-TO-SERIAL TRANSMITTER FEATURES • • • • • • • • • • • • FlatLink 3G Serial-Interface Technology Compatible With FlatLink™3G Receivers Such as SN65LVDS308 Input Supports Video Interfaces up to 24-Bit

57e6

Abstract: embedded c programming of fibonacci series DINK32 flash simm S3 motorola programmer 0X80008000 powerpc 601 advanced information assembly language programming MetaWare AN1769D
Contextual Info: Instructor’s Manual MOTOR OLA Powe rPC E xci m e r Labo rato ry Manual Jose I. Quiñones, Noel Serrano, Walter Guiot, Luis Narváez, Eisen Montalvo Department of Electrical and Computer Engineering University of Puerto Rico-Mayagüez Chuck Corley PowerPC Applications Engineering