L1239
Abstract: l0728 l0312 SGS L282 L0936 L11616 L9960 0x00000404 L1198 L1322
Contextual Info: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _
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9060/MPEG
L1239
l0728
l0312
SGS L282
L0936
L11616
L9960
0x00000404
L1198
L1322
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0x00000564
Abstract: 0x00000404 0x00000532 0x0000047C 0x000005BE STI3400 0x0000040A sgs 8 r 15 93CS46 0x0000045C
Contextual Info: PLX Technology SGS PCI MPEG Board I/O MAP 07/15/96 PCI Configuration Registers PCI CFG Offset 0x00000000 0x00000002 BIT 0-15 0-15 Function Vendor ID, Allocated to PLX by PCI SIG Read-only (Default = 10B5) Device ID, Allocated by PLX (Read-only) (Default = 9060)
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0x00000000
0x00000002
0x00000004
16-bit
93CS46)
PCI9060
93CS46
0x00000564
0x00000404
0x00000532
0x0000047C
0x000005BE
STI3400
0x0000040A
sgs 8 r 15
0x0000045C
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0x0000020C
Abstract: 0x00000158 0x0000014C 0x00000154 0x00000210 asynchronous fifo vhdl xilinx slot machine block diagram vhdl 0x00000060 0x00000048 0x00000218
Contextual Info: FlexRay v1.1 DS544 May 17, 2007 Product Specification Introduction LogiCORE Facts The LogiCORE FlexRay™ controller implements the FlexRay communication protocol as defined in the FlexRay Protocol Specification v2.1 Rev A. The FlexRay controller implementation supports a single communication channel. This document defines the architecture
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DS544
0x0000020C
0x00000158
0x0000014C
0x00000154
0x00000210
asynchronous fifo vhdl xilinx
slot machine block diagram vhdl
0x00000060
0x00000048
0x00000218
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flexray PROTOCOL
Abstract: 0x0000020C slot machine block diagram vhdl 0x00000204 0x00000158 Spartan 3E VHDL code 0x00000338 0x0000014C 0x00000210
Contextual Info: - DISCONTINUED PRODUCT 0 FlexRay v1.1 DS544 May 17, 2007 Product Specification Introduction LogiCORE Facts The LogiCORE FlexRay™ controller implements the FlexRay communication protocol as defined in the FlexRay Protocol Specification v2.1 Rev A. The FlexRay
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DS544
flexray PROTOCOL
0x0000020C
slot machine block diagram vhdl
0x00000204
0x00000158
Spartan 3E VHDL code
0x00000338
0x0000014C
0x00000210
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la2 d2 timer
Abstract: L0936 Header 13X2 l0728 PIN DIAGRAM OF IC LM7805 U0202 L9960 STI3400 L1239 L4204
Contextual Info: Go to next Section: PCI to Local Bridge Performance Study Return to Table of Contents Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PLX Technology SGS PCI MPEG Board Engineering Changes 07/15/96 1. The PCI9060 always reads long words, even when the local bus is configured for 16-bits. Modify the BUSCTL
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PCI9060
16-bits.
la2 d2 timer
L0936
Header 13X2
l0728
PIN DIAGRAM OF IC LM7805
U0202
L9960
STI3400
L1239
L4204
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PDF
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0x00000378
Abstract: 0x0000043C
Contextual Info: - DISCONTINUED PRODUCT XPS FlexRay Controller v1.00a DS636 October 30, 2007 Product Specification Introduction LogiCORE Facts The Xilinx FlexRay LogiCORE product specification defines the architecture and features of the Xilinx FlexRay controller. This document also defines the
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DS636
128-bit
0x00000378
0x0000043C
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L0936
Abstract: L0988 L9960 L1239 STI3400 L1462 E442 L1105 L3216 U0601
Contextual Info: Using the PCI 9060 without a CPU SGS Thomson MPEG with PCI 9060 PCI 9060/MPEG AN January 14, 1996 MPEG to PCI bus Application Note _ _ _ General Description _ Features_
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9060/MPEG
L0936
L0988
L9960
L1239
STI3400
L1462
E442
L1105
L3216
U0601
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