06JUL2004 Search Results

p16nk60

Abstract: p16nk60z
Contextual Info: STP16NK60Z - STB16NK60Z-S STW16NK60Z N-CHANNEL 600V - 0.38 Ω - 14 A TO-220 /I2SPAK/TO-247 Zener - Protecdet SuperMESH MOSFET TARGET SPECIFICATION Table 1: General Features Figure 1: Package TYPE VDSS RDS on ID Pw STP16NK60Z STB16NK60Z-S STW16NK60Z 600 V

54VCXH162245

Abstract: RHRXH162245K01Q RHRXH162245K01V RHRXH162245K02Q RHRXH162245K02V RHRXH162245K1 RHRXH162245K2
Contextual Info: 54VCXH162245 RAD HARD LOW VOLT. CMOS 16-BIT BUS TRANSCEIVER 3-STATE WITH 3.6V TOLERANT INPUTS AND OUTPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED A OUTPUTS: tPD = 3.4 ns (MAX.) at VCC = 3.0 to 3.6V

p16nk60

Abstract: p16nk60z w16N JESD97 STB16NK60Z-S STB16NK65Z-S STP16NK60Z STP16NK65Z STW16NK60Z
Contextual Info: STP16NK60Z - STB16NK60Z-S STW16NK60Z N-CHANNEL 600V - 0.38 Ω - 14 A TO-220 /I2SPAK/TO-247 Zener - Protecdet SuperMESH MOSFET TARGET SPECIFICATION Table 1: General Features Figure 1: Package TYPE VDSS RDS on ID Pw STP16NK60Z STB16NK60Z-S STW16NK60Z 600 V

Contextual Info: 54VCXH162245 Rad hard low voltage CMOS 16-bit bus buffer transceiver 3-state with 3.6 V tolerant inputs and outputs Features • 1.65 to 3.6 V inputs and outputs ■ High speed A outputs: – tPD = 3.4 ns at VCC = 3.0 to 3.6 V – tPD = 4.3 ns at VCC = 2.3 to 2.7 V

H162245

Contextual Info: 54VCXH162245 RAD HARD LOW VOLT. CMOS 16-BIT BUS TRANSCEIVER 3-STATE WITH 3.6V TOLERANT INPUTS AND OUTPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED A OUTPUTS: tPD = 3.4 ns (MAX.) at VCC = 3.0 to 3.6V

m2006

Contextual Info: Preliminary Information Integrated Circuit Systems, Inc. M2006-02 VCSO BASED FEC CLOCK PLL GENERAL DESCRIPTION PIN ASSIGNMENT 9 x 9 mm SMT 27 26 25 24 23 22 21 20 19 FIN_SEL1 GND NC DIF_REF0 nDIF_REF0 REF_SEL DIF_REF1 nDIF_REF1 VCC The M2006-02 is a VCSO (Voltage Controlled SAW

54VCXH162245

Abstract: RHRXH162245K1 RHFXH162245K03V
Contextual Info: 54VCXH162245 Rad hard low voltage CMOS 16-bit bus buffer transceiver 3-state with 3.6 V tolerant inputs and outputs Features • 1.65 to 3.6 V inputs and outputs ■ High speed A outputs: – tPD = 3.4 ns at VCC = 3.0 to 3.6 V – tPD = 4.3 ns at VCC = 2.3 to 2.7 V

54VCXH162245

Abstract: RHFXH162245K-01V RHRXH162245K-01V RHRXH162245K-02V
Contextual Info: 54VCXH162245 Rad hard low voltage CMOS 16-bit bus buffer transceiver 3-state with 3.6V tolerant inputs and outputs Features • 1.65 to 3.6V inputs and outputs ■ High speed A outputs: – tPD = 3.4ns at VCC = 3.0 to 3.6V – tPD = 4.3ns at VCC = 2.3 to 2.7V

M45PExx

Abstract: UM0091 flash read verilog
Contextual Info: UM0091 USER MANUAL Verilog HDL Model for the M45PExx SPI Flash Pack This Project gives a Verilog HDL behavioral model of the M45PExx family of SPI Serial Flash Memory devices. To give a more complete example of a Verilog HDL project, some other Verilog HDL files are also

Contextual Info: 54VCXH162245 RAD HARD LOW VOLT. CMOS 16-BIT BUS TRANSCEIVER 3-STATE WITH 3.6V TOLERANT INPUTS AND OUTPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 3.6V TOLERANT INPUTS AND OUTPUTS HIGH SPEED A OUTPUTS: tPD = 3.4 ns (MAX.) at VCC = 3.0 to 3.6V

Contextual Info: 54VCXH162245 Rad hard low voltage CMOS 16-bit bus buffer transceiver 3-state with 3.6V tolerant inputs and outputs Features • 1.65 to 3.6V inputs and outputs ■ High speed A outputs: – tPD = 3.4ns (Max) at VCC = 3.0 to 3.6V – tPD = 4.3ns (Max) at VCC = 2.3 to 2.7V

Contextual Info: 54VCXH162245 Rad-hard low voltage CMOS 16-bit bus buffer transceiver 3-state with 3.6 V tolerant inputs and outputs Datasheet - production data • Latch-up performance exceeds 300 mA (JESD 17) • ESD performance: – HBM > 2000 V (MIL STD 883 method 3015)

54VCXH162245

Abstract: JESD97 RHFXH162245K-01V RHRXH162245K-01V RHRXH162245K-02V
Contextual Info: 54VCXH162245 Rad hard low voltage CMOS 16-bit bus buffer transceiver 3-state with 3.6 V tolerant inputs and outputs Features • 1.65 to 3.6 V inputs and outputs ■ High speed A outputs: – tPD = 3.4 ns at VCC = 3.0 to 3.6 V – tPD = 4.3 ns at VCC = 2.3 to 2.7 V

OTU1

Abstract: m2006
Contextual Info: Preliminary Information Integrated Circuit Systems, Inc. M2006-12 VCSO BASED FEC CLOCK PLL GENERAL DESCRIPTION PIN ASSIGNMENT 9 x 9 mm SMT 27 26 25 24 23 22 21 20 19 FIN_SEL1 GND APC DIF_REF0 nDIF_REF0 REF_SEL DIF_REF1 nDIF_REF1 VCC The M2006-12 is a VCSO (Voltage Controlled SAW

7-1579001-9

Abstract: 2157 CSV10
Contextual Info: TH I S DRAW ING IS UNPUBLI SHED. C O R Y RI G HT 2009 C S V 10 CSV10 RELEASED BY TYCO ELECTRONICS CORPORATION HAND TOOL HANDZANGE FOR ALL PUBLICATION RIGHTS 2009 LOC RESERVED. REV I S IONS D I ST A LTR DESCRIPTION F O R S O L A R L O K C O N T A C T S 4 A N D 6 mm ^

GR-253

Abstract: M2006-02 M2006-12 m2006
Contextual Info: Product Brief Integrated Circuit Systems, Inc. M2006-02/-12 VCSO BASED FEC CLOCK PLL / HITLESS SWITCHING OPTION PIN ASSIGNMENT 9 x 9 mm SMT 27 26 25 24 23 22 21 20 19 FIN_SEL1 GND The M2006-02 and -12 are VCSO (Voltage Controlled SAW Oscillator) based clock generator PLLs designed

RHFXH162245K03V

Contextual Info: 54VCXH162245 Rad hard low voltage CMOS 16-bit bus buffer transceiver 3-state with 3.6 V tolerant inputs and outputs Features • 1.65 to 3.6 V inputs and outputs ■ High speed A outputs: – tPD = 3.4 ns at VCC = 3.0 to 3.6 V – tPD = 4.3 ns at VCC = 2.3 to 2.7 V