027R Search Results

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Abstract: TNC 24 mk 2 026R CY7C09569V tb136 A14L CY7C09579V
Contextual Info: «oaHaoooiMMMWfMMMMMM!9:^ v’*'» -• -■ -■ -^ jjÉBT *¿f5’00“’ '*'^ 7“T ■ ■ ■ ■ <1; .r {• o CY7C09569V CY7C09579V PRELIMINARY f:,ò b 3.3V 16K/32K x 36 FLEx36 Synchronous Dual-Port Static RAM • 3.3V Low o p e ratin g p ow er

Contextual Info: i|g; m I | • ''• d m r 1 M L HIGH-SPEED 3.3V 16K x 36 | SYNCHRONOUS PIPELINED DUAL-PORT STATIC ra m PRELIMINARY IDT70V3569S F ea tu re s: ♦ True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed clock to data access

Contextual Info: 1»ill 1IFV1F 1 1 U 1 ‘! S y P r • W 0 L HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V3569S F ea tu re s: ♦ True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed clock to data access

Contextual Info: 1» i l l 1 I F V 1 F III 11 Jl 1 ‘! S y P r • L HIGH-SPEED 3.3V 32K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V3579S F ea tu re s: ♦ True Dual-Ported memory cells which allow simultaneous access of the same memory location

Contextual Info: V CYPRESS CY7C056V CY7C057V PRELIMINARY 3.3V 16K/32K x 36 FLEx36 Asynchronous Dual-Port Static RAM Features True dual-ported m em ory cells which allow sim ulta­ neous access of the same m em ory location 16K x 36 organization CY7C056V 32K x 36 organization (CY7C057V)

027R

Abstract: 351N 70V3579 A12L IDT70V3579 IDT70V3579S
Contextual Info: HIGH-SPEED 3.3V 32K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V I/O PRELIMINARY IDT70V3579S Features: * * * * * * True Dual-Port memory cells which allow simultaneous access o f the same memory location High-speed clock to data access

Contextual Info: Westcode “P ” series of fast-switching thyristors have regenerative gate structure to ensure low switching losses and high di/dt performance. Low reverse recovery charge values combined with the low forward switching losses make the “P” series particularly attractive in

Contextual Info: 1 » i l l 1 IF V 1 F 1 1 U 1 ‘! S y P r • W 0 L HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V3569S F ea tu re s: ♦ True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed clock to data access

bU1011

Abstract: 026R ca2dc CY7C09569V
Contextual Info: CY7C09569V CY7C09579V PREUM INAm 3.3V 16K/32K x 36 FLEx36 Synchronous Dual-Port Static RAM 3.3V Low operating power Features • True Dual-Ported mem ory cells which allow sim ulta­ neous access of the same mem ory location • 2 Flow-Through/Pipelined devices

BIR-BO13E4G-1

Abstract: BIR-BO03E4G-1 BIR-BM13E4G-2 BIR-NM13C1 BIRBO13V4V2 BIR-BO13K4Q BIR-BM1331 BIR-BN0331 BIR-BO0331 L-11250
Contextual Info: INFRARED EMITTING DIODE-END LOOK Chip Package 3I 5I Part No. Material Wavelength Op Lens Color VF V @IF=50mA Ee(mW/sr) @IF=50mA Typ Max Min Typ BIR-BM1331 GaAIAs/GaAs 940 1.25 1.50 11.78 33.40 BIR-BM1331-A GaAIAs/GaAs 940 1.25 1.50 11.78 33.40 BIR-BO1331

Contextual Info: i|g; m I | • I M | L HIGH-SPEED 3.3V 32K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V3579S F ea tu re s: ♦ True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed clock to data access

026R

Abstract: M0192 LSE 019L
Contextual Info: CY7C056V CY7C057V PRELIMINARY 3.3V 16K/32K x 36 FLEx36 Asynchronous Dual-Port Static RAM E xp a n d ab le d ata bus to 72 b its o r m ore u sing M a s ­ te r/S la v e C hip S ele ct w hen using m o re th an o n e d evice Features • True D u al-P o rted m e m o ry cells w h ich allo w s im u lta ­

CY7C09569V

Abstract: CY7C09579V
Contextual Info: # CYPRESS CY7C09569V PRELIMINARY _ CY7C09579V 3.3V 16K/32K x 36 FLEx36 Synchronous Dual-Port Static RAM 3.3V Low operating power Features • True dual-ported m em ory cells which allow sim ulta­ neous access of the same m em ory location • Two Flow-Through/Pipelined devices

CY7C09569V

Contextual Info: ! ^ '•ttttttttWÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄW1- J M N K ♦ < ij / CY7C09569V CY7C09579V PRELIMINARY 5; 3.3V 16K/32K x 36 FLEx36 Synchronous Dual-Port Static RAM 3.3 V Low o p e ratin g p ow er Features — A c tiv e = 165 m A typ ical • True D u al-P o rted m e m o ry cells w h ich allo w s im u lta ­