01OL Search Results

CY7C028-15AI

Abstract: WH15 CY7C027 CY7C028 CY7C037 CY7C038 IDT7027
Contextual Info: CY7C027/028 CY7C037/038 PRELIMINARY 32K/64K x 16/18 Dual-Port Static RAM Fully asynchronous operation Automatic power-down Expandable data bus to 32/36 bits or more using Mas­ ter/Slave chip select when using more than one device On-chip arbitration logic

PFR 15T

Abstract: c3ke hcn 73 IDT709269 IDT709279 014L
Contextual Info: : mMMMMWMJ!. CY7C09269/79/89 CY7C09369/79/89 PRELIMINARY CYPRESS 16K/32K/64K x16/18 Synchronous Dual Port Static RAM • Low operating power Features — Active= 195 mA typical • True Dual-Ported mem ory cells which allow sim ulta­ neous access of the same memory location

A12L

Abstract: CY7C09349 CY7C09359
Contextual Info: fax id: 521 9 CYPRESS CY7C09349 CY7C09359 PRELIMINARY 4K/8K x 18 Synchronous Dual-Port Static RAM • H ig h-speed clo ck to d ata ac ce ss 6 .5 /7 .5 /1 2 ns m ax. Features • Low o p e ratin g p o w er • True D u al-P o rted m e m o ry cells w h ich allo w sim u lta­

Contextual Info: V CYPRESS CY7C056V CY7C057V PRELIMINARY 3.3V 16K/32K x 36 FLEx36 Asynchronous Dual-Port Static RAM Features True dual-ported m em ory cells which allow sim ulta­ neous access of the same m em ory location 16K x 36 organization CY7C056V 32K x 36 organization (CY7C057V)

S6111

Abstract: DRA01B DRA01C DRA01E DRA03TB DRA03TC DRA03TE SG16AA40 SG16AA60 SG25AA20
Contextual Info: iü & s t? p u r p p IrtlrtLOlßW 0 0 0 0*0 co eo m co cnj OOOOO r r o£ cw : te G> csi co eo co o LOLOLOLOLO LOLOo O o esj eo cg co eo co co o O O OOOOO o O -H OOOOO OOOOO CO Tstg LOLO1 -04 -0LO o o o o lo LOLOLOLOLO LOLOLOLOLO LOLOlo lo O O co co co co eo

Contextual Info: fax id: 5215 CY7C027V/028V CY7C037V/038V '•'■'■'■'■'■'■‘JJSt>iW .-. 'S^ìa S S K , : ,„*$& :*■ _ jg ? . "T 3.3V 32K/64K x 16/18 Dual-Port Static RAM • Fully asynchronous operation • Automatic power-down • Expandable data bus to 32/36 bits or more using Mas­

CY7C09349-6AC

Abstract: LT 5219 SAD XT
Contextual Info: fax id: 5219 7^ CYPRESS CY7C09349 CY7C09359 PRELIMINARY 4K/8K x 18 Synchronous Dual-Port Static RAM • High-speed clock to data access 6.5/7.5/12 ns max. • Low operating power Features • True Dual-Ported mem ory cells which allow sim ulta­ neous access of the same mem ory location

LB1910

Abstract: 70V37 A14L IDT70V37 IDT70V37L
Contextual Info: HIGH-SPEED 3.3V 32Kx 18 DUAL-PORT STATIC RAM PRELIMINARY IDT70V37L F e a tu re s True Dual-Ported m em ory cells w hich allow sim ultaneous access of the sam e m em ory location ♦ High-speed access ♦ Com m ercial: 15/20ns max. - ♦ Low -pow er operation

A14L

Abstract: A15L A15R IDT7038 IDT7038L marking 016L
Contextual Info: H IG H-SPEED 64K x 18 DUAL-PORT STATIC RAM Features * True Dual-Ported memory cells which allow simultaneous reads of the same memory location * High-speed access - Com m ercial: 15/20ns max. * Low-power operation - ID T7038L A ctive: 1W (typ.) Standby: 1m W (typ.)

3XXXS

Abstract: Typ41 marking code JSW IDT70V9289 IDT70V9289L xsxx
Contextual Info: A . /s ilk |iB |B IB a F . 1 1 1 1 1 I W 0 WL HIGH-SPEED 3.3V 64K x 16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V9289L Features: * * * True Dual-Ported m em ory cells w hich allow sim ultaneous access of the sam e m em ory location

A0L-A12L

Abstract: A12L CY7C09349A CY7C09349A-12AC CY7C09349A-6AC CY7C09349A-7AC CY7C09349A-9AC CY7C09359A CY7C09359A-6AC IND5
Contextual Info: - - = CYPHhbo CY7C09349A PRELI MI NARY_ CY7C09359A = 4K/8K x 18 Synchronous Dual-Port Static RAM High-speed clock to data access 6.5l1V7.5/9/12 ns max. Low operating power Features • True dual-ported m em ory cells which allow sim ulta­ neous access of the same m em ory location

Contextual Info: fax id: 5221 CYPRESS CY7C027/028 CY7C037/038 PRELIMINARY 32K/64KX 16/18 Dual-Port Static RAM Features • Fully asynchronous operation • Automatic power-down • True Dual-Ported m emory cells which allow simulta­ neous access of the same memory location

2740 D

Abstract: C4645
Contextual Info: gjjirN HIGH-SPEED 4Kx 16 DUAL-PORT STATIC RAM Integrated Device Technology, inc. FEATURES: IDT7024S/L • T ru e D u a l-P o rte d m e m o ry c e lls w h ic h a llo w s im u lta ­ n e o u s re a d s o f th e s a m e m e m o ry lo c a tio n • m o re th a n o n e d e v ice

D3254

Contextual Info: QS7024A PRELIMINARY High-Speed CMOS 4K x 16 Asynchronous Dual-Port RAM Q FEATURES QS7024A DESCRIPTION High-speed asynchronous dual-port architecture Access times from either port, 20/25/35/55 ns Industry standard pin-out Independent port access and control

2600 corning

Contextual Info: CY7C09269V/79V/89V CY7C09369V/79V/89V “ tv * I PRELIMINARY 3.3V 16K/32K/64K x 16/18 Synchronous Dual-Port Static RAM • High-speed clock to data access 7.5^1V9/12 ns max. • 3.3V Low operating power Features • True Dual-Ported memory cells which allow sim ulta­

Q4006LT

Abstract: teccor Q2006LT triac and diac triac 410 Q5010LT Q4010L diac 10A Internally Triggered Triacs triggered triacs
Contextual Info: THERM OTAB T 0 -2 2 0 A B Is o la te d QUADRACs Internally Triggered Triacs ( 4 - 1 5 Amps) Genera! Description Variations of devices in this data sheet are available fo r custom design applications. Please consult the factory for more inform a­ tion.

Contextual Info: PRELIMINARY IDT709279S/L HIGH-SPEED 32K x 16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM F e a tu re s * True D ual-Ported m em ory c e lls w hich allow sim u lta n e o u s Full sy n c h r o n o u s operation on both p orts a c c e s s of the sa m e m em ory location

Contextual Info: HIGH-SPEED 32K x 16 DUAL-PORT STATIC RAM IDT7027S/L Features True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed access - Military: 25/35/55ns max - Industrial: 25ns (max.) - Commercial : 20/25/35/55ns (max.)

Contextual Info: HIGH-SPEED 8 K x 16 DUAL-PORT STATIC RAM ydt IDT7025S/L In tegrated De vice T e c h n o lo g y , Inc. FEATURES: more than one d e vice M /S = H for BUSY output flag on Master M/S = L for BUSY input on Slave Busy and Interrupt Flags On-chip port arbitration logic

Contextual Info: HIGH-SPEED 4 K x 16 DUAL-PORT STATIC RAM Features ♦ True Dual-Ported memory cells which allow simultaneous reads of the same memory location ♦ High-speed access - Military:20125135155170ns max. - Industrial: 55ns (max.) - Commercial: 15/17120125135155ns (max.)

Contextual Info: HIGH-SPEED 16Kx 16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT709269S/L Integrated Device Technology, Inc. FEATURES: • • True Dual-Ported m em ory cells which allow sim ulta­ neous access of the sam e m em ory location • H igh-speed clock to data access

Contextual Info: HIGH-SPEED 16Kx 16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT709269S/L Integrated Device Technology, Inc. FEATURES: • • True Dual-Ported m em ory cells w hich allow sim ulta­ neous access of the sam e m em ory location • H igh-speed clock to data access

CY7C027V

Abstract: CY7C028V CY7C037V CY7C038V IDT70V27
Contextual Info: W OYPHESS CY7C027V/028V CY7C037V/038V PRELIMINARY 3.3V 32K/64K x 16/18 Dual-Port Static RAM Fully as yn ch ro n o u s o peratio n Features A u to m atic pow er-dow n True D u al-P o rted m e m o ry cells w h ich allo w sim u lta­ n eo us ac c e s s o f th e s a m e m e m o ry location

A11R-A0R

Abstract: 7 segmen QS7024A
Contextual Info: QS7024A PRELIMINARY High-Speed CMOS 4K x 16 Asynchronous Dual-Port RAM Q FEATURES QS7024A DESCRIPTION High-speed asynchronous dual-port architecture Access times from either port, 20/25/35/55 ns Industry standard pin-out Independent port access and control