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| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
9472Contextual Info: 9 National Semiconductor 74F112 Dual JK Negative Edge-Triggered Flip-Flop General Description The 'F112 contains two independent, high-speed JK flipflops with Direct Set and Clear inputs. Synchronous state changes are initiated by the falling edge of the clock. Trig |
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74F112 bS01122 00flZ217 9472 |