00B224 Search Results

TRIAC BT 136

Abstract: BT 136 TRIAC BT136 working triac bt136 temperature control by triac BT136 triac bt 135 bt136 triac TRIAC TAG 90 BT136 motor BT136 application note
Contextual Info: PHILIPS INTERNATIONAL bSE ]> • 711Da2b 00bS23ö ^ 3 «PHIN BT136 SERIES y V. TRIACS Glass-passivated 4 ampere triacs intended fo r use in applications requiring high bidirectional transient and blocking voltage capability and high thermal cycling performance w ith very low thermal

triac tag 87

Abstract: TRIAC BT 136 BT136 working triac bt136 triac bt 135 BT 136 TRIAC TRIAC BT 136-500D TO220 bt136 triac D8384 triac BT 06 400
Contextual Info: P H IL I P S INTERNATIONAL bSE 711D a2b T> 00bS 23ö ^ 3 • P H IN BT136 SERIES TRIACS Glass-passivated 4 ampere triacs intended fo r use in applications requiring high bidirectional transient and blocking voltage capability and high therm al cycling performance w ith very low thermal

DS34C86N

Abstract: B699 DS3486 DS34C86 DS34C86M J16A M16A N16A RS-423
Contextual Info: p r e lim in a r y y y \ N a t io n a l dum S e m ic o n d u c t o r T -7 5 -4 5 -0 5 DS34C86 Quad CMOS Differential Line Receiver General Description Features The DS34C86 is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and

Contextual Info: ttSfSSf! HCS08MS Radiation Hardened Quad 2-Input AND Gate August 1995 Features • Pinouts 14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE SBDIP MIL-STD-1835 CDIP2-T14 TOP VIEW 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K RAD(Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT ¿ ¿ P D 4 2 2 8 0 2 M BIT FIELD BUFFER The /tPD42280 is a high-speed field buffer equipped with a memory of 256K words x 8 b it 262, 224x8bit configuration. The high-speed and the low power consumption are realized in CMOS dynamic circuit.

Contextual Info: HCS10MS HARRIS æ S E M I C O N D U C T O R Radiation Hardened Triple 3-Input NAND Gate September 1995 Pinouts Features 3 Micron Radiation Hardened SOS CMOS 14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE SBDIP MIL-STD-183S CDIP2-T14, LEAD FINISH C TOP VIEW

PD488170L

Abstract: NEC Rambus RDRAM cross reference NSN LTE NEC RDRAM 36
Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT ¿iPD488170L 18M-BIT Rambus D RA M 1 M - W O R D X 9- BI T X 2 - B A N K Description The 18-Megabit Rambus DRAM RDRAM™ is an extrem ely-high-speed CMOS DRAM organized as 2M w ords by 9 bits and capable o f bursting up to 256 bytes o f data at 2 ns per byte. The use of Rambus S ignaling