00A07 Search Results

Contextual Info: ENGINEERED COMPONENTS C bOE D 3333S53 00a07Tl Zt.7 • EGC Cozv profite t 2l COMPATIBLE MiNi Dl MULTI LOGIC DELAYVL'INE J T2L inputs and outputs Delays stable and precise 8-pin DIP package Leads - thru-hole, J, Gull Wing, or Tucked Rise time for all modules is 4ns maximum when measured

MD2FLDL-TTL

Abstract: MD2FLDL-TTL-35 sdg-f
Contextual Info: ENGINEERED COMPONENTS C b OE D 3333S53 00a07Tl Zt.7 • EGC Cozv profite t 2l COMPATIBLE MiNi Dl MULTI LOGIC DELAYVL'INE J T2L inputs and outputs Delays stable and precise 8-pin DIP package Leads - thru-hole, J, Gull Wing, or Tucked Rise time for all modules is 4ns maximum when measured

Biphase mark code

Abstract: PC74HC126 biphase SAA7274 D73D DDA0725 SAA7274P SAA7274T
Contextual Info: INTERIC SAA7274 SOUND AUDIO DIGITAL INPUT CIRCUIT ADIC G E N E R A L DESCRIPTIO N T he S A A 7 2 7 4 is an A u d io Digital In p u t C ircu it (A D IC ) w hich converts digital audio signals in accordance w ith th e IEC /E BU standards, IEC tech. com. No. 84, seer. 50, Jan. 1987 in to an equivalent

LT017

Contextual Info: 84220 84220 Quad 100BaseTX/100BaseFX/10BaseT Physical Layer Device 99036 This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. Note: Check for latest Data Sheet revision before starting any designs. SEEQ Data Sheets are now on the Web, access

the RMII Consortium Specification

Abstract: IEEE 802.3 10BaseT RMII Consortium
Contextual Info: 84221 84221 Quad 100BaseTX/10BaseT Physical Layer Device PRELIMINARY 99191 This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. Note: Check for latest Data Sheet revision before starting any designs. SEEQ Data Sheets are now on the Web, access

the RMII Consortium Specification

Abstract: Mlt-3 LED1044 ST6179 4B5B decoder 842.21 ua 7809 10BT F840 LINK100
Contextual Info: 84221 84221 Quad 100BaseTX/10BaseT Physical Layer Device PRELIMINARY 99191 Features Note: Check for latest Data Sheet revision before starting any designs. • Single Chip 100BaseTX/10BaseT Physical Layer Solution SEEQ Data Sheets are now on the Web, at www.lsilogic.com

Contextual Info: LSiirautH" 80220/80221 10OBASE- TX/1OBASE- T Ethernet Media Interface Adapter 98184 This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. Features • Single Chip 100B ase-T X /1 OBase-TPhysical Layer Note: C heck fo r latest Data Sheet revision

Contextual Info: S G S -T H O M S O N S T 6 2 E 8 5 M n s m i i L i g ir i^ C T n G i S T 6 2 T 8 5 8-BIT EPROM HCMOS MCU WITH DOT MATRIX LCD DRIVER AND A/D CONVERTER • 4.5 to 6V supply operating range ■ 8.4MHz Maximum Clock Frequency ■ -40 to +85°C Operating Temperture Range

stepping motor EM 323

Abstract: PD78213 em 154* "stepping motor" ZPD78213GQ-36 d78214 10000H D7821 PD78212 1NTC0 BT 815 transistor
Contextual Info: D A TA SHEET MOS INTEGRATED CIRCUIT ¿¿PD78212, 78213, 78214 8-BIT SINGLE-CHIP MICROCOMPUTER DESCRIPTION The //PD78212,78213 and 78214 are 78K/H series products. The 78K/II series is an 8-bit single chip microcomputer which can access the memory space o f 1M byte with an external expansion.

lq8022

Abstract: 10BT LINK100 center tap transformer 18 0 18 decoder 4bit
Contextual Info: 80220/80221 80220/80221 ry 100BASE-TX/10BASE-T Ethernet Media Interface Adapter Technology Incorporated September 15, 1997 PRELIMINARY DATA SHEET Features Note: Check for latest Data Sheet revision before starting any designs. • Single Chip 100Base-TX / 10Base-T Physical Layer

two4b

Abstract: EN 593 10 35L CAP count basie mdc 1200 Encoder/Decoder Seeq Technology LINK100 T40E 8025g 4B5B decoder
Contextual Info: 80220/80221 Technology Incorporated 100BASE-TX/1OBASE-T Ethernet Media Interface Adapter DATA SHEET Features • Single Chip 100B ase-TX /10B ase-TP hysical Layer Solution ■ ■ ■ ■ ■ ■ ■ D ual Speed -1 0 0 /1 0 Mbps H alf A n d Full Duplex M il Interface To Ethernet Controller

Contextual Info: 80220/80221 Technology Incorporated 100BASE~TX/1 OBASE'T Ettiemet Media Interface Adapter PRELIMINARY DATA SHEET Features • Single Chip 100Base-TX/10Base-TPhysical Layer Solution ■ Dual Speed -100/10 Mbps ■ Half And Full Duplex ■ Mil Interface To Ethernet Controller

32 NAC 12 T42

Abstract: NSM 4000A jrc 2340 DD607 S53 MARKING
Contextual Info: E ï . S G S -T H O M S O N ÎILiCT^OlDes ST6280 8-BIT HCMOS MCU WITH DOT MATRIX LCD DRIVER EEPROM AND A/D CONVERTER • 4.5 to 6V supply operating range ■ 8.4 MHz Maximum Clock Frequency ■ -40 to +85°C Operating Temperature Range ■ Run, Wait & Stop Modes

80223

Abstract: IEEE 802.3 Clause 2 4B5B decoder ATIC 164 D2 48 pin
Contextual Info: 80223 Technology Incorporated 10/100 MbpsTX/FX/1 OBT Ethernet Physical Layer Device PHY PRELIMINARY DATA SHEET Features U Single Chip 100Base-TX / FX/10Base-T Physical Layer Solution U 3.3V Version o f SEEQ 80221 • ■ ■ ■ ■ ■ ■ ■ D ual Speed -1 0 /1 0 0 Mbps

TQ80223

Abstract: 1812 footprint dimension TG110-5050
Contextual Info: 80223 80223 10/100 MbpsTX/FX/10BT Ethernet Physical Layer Device PHY 98285 This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. Note: Check for latest Data Sheet revision before starting any designs. SEEQ Data Sheets are now on the Web, access

amp 269040-1

Abstract: 269040-1 MD400183
Contextual Info: 84225 84225 Quad 100BaseTX/FX/10BaseT Physical Layer Device 99061 PRELIMINARY This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. Note: Check for latest Data Sheet revision before starting any designs. SEEQ Data Sheets are now on the Web, access

TQ80223

Contextual Info: smsc LAN83C183 PRELIMINARY STANDARD MICROSYSTEMS CORPORATION 10/100 Mbps TX/FX/10BT Ethernet Physical Layer Device PHY FEATURES Single Chip 100BASE-TX / FX/10BASE-T Physical Layer Solution Dual Speed -1 0 /1 0 0 Mbps Half And Full Duplex M il Interface To Ethernet Controller

Contextual Info: 84225 LSI LOGIC Quad 100BaseTX/FX/10BaseT Physical Layer Device PR ELIM INA R Y This document is an LSI Logic document. Any reference to SEEQ Technology should be considered LSI Logic. 99061 Note: Check for latest Data Sheet revision before starting any designs.

Contextual Info: SEEQ Technology Incorporated 84220 Quad 100BaseTX/100BaseFX/10BaseT Physical Layer Device Novem ber 19 1998 Note: Check for latest Data Sheet revision before starting any designs. Call SEEQ Technology 510 226-2903 — o r— SEEQ Data Sheets are n o w on the Web, access

L80225

Abstract: HALO TG22-3506ND TG22-3506ND LINK100 ssd schematic l80225/b LSI L80225
Contextual Info: L80225 10/100 MbpsTX/10BT Ethernet Physical Layer Device PHY Technical Manual Features • Single Chip 100Base-TX /10Base-T physical layer solution • On-chip wave shaping - no external filters required • Dual Speed - 10/100 Mbps • Baseline Wander Correction

TS01 1005

Abstract: b7al 596c-8550301QX marking 113a 8X320 TS01 au dma hin tv
Contextual Info: R E V IS IO N S O C S C R IP T IO N LTR A DATC T a b le I , change param eter I c c • F ig u re 1 , change to ca se o u t lin e U. Change vendor FSCM to vendor CAGE. APPROVCO 18 May 87 RCV M U RCV ttÄ T U S R lV O f PM CS M C lt Defense Electronics Supply Center

1S14

Contextual Info: S M J S 8 1 6 B - N O V E M B E R 19 9 0 - R E V I S E D J A N U A R Y 1 9 9 3 FM PACKAGEt TOP VIEW Member of Texas Instruments SCOPE Family of Testability Products L_JI 2 Organization . . . 2048 x 8-Bit Flash Memory il il I 1 18 17 O 3 TMS 4 TCK 5 NC

TQ80223

Abstract: smsc marking 1i Lt 181
Contextual Info: LAN83C183 PRELIMINARY STANDARD MICROSYSTEMS CORPORATION 10/100 Mbps TX/FX/10BT Ethernet Physical Layer Device PHY FEATURES LED Outputs Single Chip 100BASE-TX / FX/10BASE-T Physical Layer Solution - Link - Activity Dual Speed -10/100 Mbps Half And Full Duplex

Contextual Info: SGS-THOMSON ST62E80 ST62T80 ilLi £TO *S 8-BIT EPROM HCMOS MCU WITH DOT MATRIX LCD DRIVER EEPROM AND A/D CONVERTER • 4.5 to 6V supply operating range ■ 8.4MHz Maximum Clock Frequency ■ -40 to+85°C Operating Temperture Range ■ Run, Wait & Stop Modes