0044G Search Results

D2259

Contextual Info: ISSI 128K x 36 SYNCHRONOUS PIPELINED STATIC RAM ADVANCE INFORMATION JUNE1997 FEATURES DESCRIPTION • Fast access time: The IS S IIS61SP12836 is a high-speed, low-power synchro­ nous static RAM designed to provide a burstable, highperformance, secondary cache for the i486 , Pentium™,

DiCon Fiberoptics 1x2

Contextual Info: MEMS 1X2 SWITCH DiCon’s MEMS 1x2 is based on a micro-electromechanical system MEMS chip. The MEMS chip consists of an electrically moveable mirror on a silicon support. A voltage applied to the MEMS chip causes the mirror to rotate, which changes the coupling of light

Startech

Abstract: INS8250 NS16C550 ST16C552 ST16C552CJ68 ST16C552IJ68 WD16C552 Baud Rate Generator programming table 16552
Contextual Info: STARTECH ST16C552 Printed August 7, 1995 An 35* EXf4RCompany UNIVERSAL ASYNCHRONOUS RECEIVER/TRANSMITTER WITH FIFO AND PARALLEL PRINTER PORT DESCRIPTION PLCC Package The ST16C552 is a dual universal asynchronous receiver and transmitter with 16 byte transmit and

TCI a7s

Abstract: marking z7s A17CC SD16 TL413 KD453 AK2376 TE5 marking
Contextual Info: ASA H I KASEI [AK2376] AK 2 3 7 6 AKM AUDIO INTERFACE . LSI FOR D I G I T A L CELLULAR huül u F e a t u res □ □ □ □ □ □ □ □ □ □ □ □ □ Suitable for audio interface of digital cellular 14bit linear codec TX & RX filter, compliant with CCITT recommendation

Contextual Info: 256K x 16 4-MBIT SYNCHRONOUS DYNAMIC RAM ADVANCE INFORMATION JUNE 1997 FEATURES DESCRIPTION • Clock frequency: 100 MHz ISSI's 4Mb Synchronous DRAM IS42S16128 is organized as a 131072-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer