0023BB Search Results

Contextual Info: Integrated Device Technology, Inc. 3.3V 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C3466 ADVANCE INFORMATION FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 20ns

Contextual Info: P g p GEC PLESSEY S E M I C O N D U C T O R S DS3572-2.3 MA31755 16-BIT FEEDTHROUGH ERROR DETECTION & CORRECTION UNIT EDAC The MA31755 is a 16 bit Error Detection and Correction Unit intended for use in high integrity systems for monitoring and correcting data values retrieved from memory. The EDAC

38002E4SP

Contextual Info: M IT S U B IS H I M IC RO CO M PUTERS 3800 Group S IN G L E -C H IP 8 -B IT C M O S M IC R O C O M P U T E R DESCRIPTION FEATURES The 3800 group is the 8-bit microcomputer based on the 740 family core technology. • • The 3800 group is designed for office automation equip­

486 motherboard schematic

Abstract: 486dx2 pinouts 486DX2 486dx schematic 4021-A TL05A Super386 t187 T106B J7 CHIPS TECHNOLOGIES
Contextual Info: CHIPS & TECHNOLOGIES INC SIE D • SO Töllb DDOSSba 4ÖT M C H P 9000-380 8 CHIPS CHIPS & TECHNOLOGIES INC S1E » ■ EQTflllb □□□PPbM 31S MCHP T -v 1 -1 7 -0 1 Copyright Notice Software Copyright 1992, Chips and Technologies, Inc. Manual Copyright © 1992, Chips and Technologies, Inc.

Contextual Info: bE4Tfl2S 0D23b4Q 4^5 M 5 M •■ M I T I MITSUBISHI LSIs 4 4 2 7 0 A J , T P , R T - 7 , - 8 , - 7 S , - 8 S FAST PAGE MODE 4194304-BIT 262144-WORD BY 16-BIT DYNAMIC RAM DESCRIPTION This is a family of 2 6 2 1 4 4 -w o rd by 1 6 -b it dynamic RAMS, PIN CONFIGURATION (TOP VIEW)

KM62V256CLTGE

Abstract: KM62V256C 001.2509
Contextual Info: KM62V256C, KM62U256C Family CMOS SRAM 32Kx8 bit Low Power & Low Vcc CMOS Static RAM FEATURE SUMMARY GENERAL DESCRIPTION • Process Technology: 0.7 uM CMOS • Organization: 32K x 8 • Power Supply Voltage . KM62V256C family : 3.3V +/- 0.3V KM62U256C fa m ily : 3.0V +/- 0.3V

9F08

Abstract: ma31750
Contextual Info: f.p r P I F S S F Y w S E M PRELIMINARY INFORMATION IC O N D U C T O R S DS3826-3.6 MA31754 PERIPHERAL SUPPORT CHIP PSC The MA31754 is a Peripheral Support Chip (PSC) designed to provide those features which are commonly required in an MA31750 processor system. It can be used to

Contextual Info: ¡Ordering number : EN *4971A CCD LC9947G SAfiYOl 1/5-lnch Optical Size EIA Black-and-White Solid-State Imaging Device Preliminary Package Dimensions Overview T h e L C 9 9 4 7 G is a I /5-in ch optical size fram e transfer Unit: mm C C D charge-coupled device solid-state imaging device.

IRF110

Contextual Info: i International [^Rectifier PD 9.1373 IRFI101 ON PRELIMINARY HEXFET Power MOSFET Advanced Process Technology Isolated Package High Voltage Isolation = 2.5KVRMS Sink to Lead Creepage Dist. = 4.8mm Fully Avalanche Rated Voss = 55V RDS on = 0.012Î2 lD = 44A

M6552

Abstract: PIMF MSM65524 65P524 MSM65P524 m65524 OKI nX-8
Contextual Info: O K I Semiconductor MSM65524/65P524 Oki Original High Performance CM OS 8-Bit Microcontroller GENERAL DESCRIPTION The MSM65524 is a high-perform ance 8-bit m icrocontroller that em ploys Oki's original nX-8/50 CPU core. W ith a m inim um instruction execution tim e of 400 ns 10MHz clock , the MSM65524 is

Contextual Info: KM62V256C, KM62U256C Family CMOS SRAM 32Kx8 bit Low Power & Low Vec CMOS Static RAM FEATURE SUMMARY GENERAL DESCRIPTION • Process Technology: 0.7 uM CMOS • Organization: 32K x 8 • Power Supply Voltage KM82V256C family: 3.3V +/- 0.3V KM62U256C family: 3.0V +/- 0.3V

TLCS-68000

Contextual Info: TOS HIB A UC/UP 54E J> m lO r n m TOSHIBA 1. 0023^ 442 « T O S H TMP68230 INTRODUCTION -V- 33- The TMP68230 parallel interface/timer (PI/T) provides versatile double buffered parallel interfaces and a system oriented timer for TLCS-68000 systems. The parallel