002270S Search Results

Contextual Info: Data Sheet August 1996 mi c r o e l e c t r o n i c s gr oup Lucent Technologies Bell Labs Innovations • Four 10 Mbits/s Ethernet transceivers and MACs integrated together with separate transmit and receive port FIFOs and a single DMA interface simplity the design of a frame-switching hub. Each

Contextual Info: 128K x 8 3.3V SYNCHRONOUS SRAM LATE WRITE WITH ZBT AND PIPELINED OUTPUT PRELIMINARY IDT71V508 Integrated Device Technology, Inc. FEATURES: • • • • • • • 128K x 8 memory configuration High speed -100 MHz 5 ns Clock-to-Data Access Registered Output