0013D2 Search Results

Contextual Info: CXB1582Q SONY Fibre Channel Receiver Description The CXB1582Q is a receiver IC with a built-in PLL clock recovery circuit for high-speed serial data recep­ tion. It can be used together with the transmitter IC, CXB1581Q, as a chip set and 1062.5Mbaud, 20-bit or

Contextual Info: PRELIMINARY M IC R O N I MT4LC1M16H5 1 MEg x 16 BURST EDO DRAM BURST EDO DRAM 1 MEG x 16 FEATURES • Burst order, interleave or linear, programmed by executing WCBR cycle after initialization • Single power supply: +3.3V ±5% • All inputs and outputs are LVTTL compatible with 5V

SI-40249

Contextual Info: l DO DpF 2 K V [P8> 75 -A /W 6> 1 .2 5 : 1 6> 75 Cp e > -A A /V ELECTRICAL SPECIFICATIONS: NDTES 1.0 TURNS RATIO P 6 -P 5 -P 4 ) i (J 6 -J 3 ) (P 3 -P 2 -P 1 ) i (J2-J1) i 1 .2 5 C T 2.0 INDUCTANCE (P 6 -P 4 ) P3-P1 (WITH J2 AND J1 SHCIRT) 4.0 INTERWINDING CAPACITANCE <P6,P5,P4> TD (J6,J3>