000Q00 Search Results

Contextual Info: F Z J ^7# S G S -T H O M S O N M S M i[ L I@ » [ l] § ST95041 SERIAL ACCESS SPI BUS 4K (512 x 8 EEPROM • 100,000 ERASE/WRITE CYCLES ■ 40 YEARS DATA RETENTION ■ SINGLE 4.5V to 5.5V SUPPLY VOLTAGE ■ SPI BUS COMPATIBLE SERIAL INTERFACE ■ 2 MHz CLOCK RATE MAX

Contextual Info: SGS-1HOMSON ÌM ST95P04 SERIAL ACCESS SPI BUS 4K 5 1 2 x 8 EEPROM NOT FOR NEW DESIGN 1 MILLION ERASE/WRITE CYCLES 10 YEARS DATA RETENTION SINGLE 3V to 5.5V SUPPLY VOLTAGE SPI BUS COMPATIBLE SERIAL INTERFACE 1 MHz CLOCK RATE MAX BLOCK WRITE PROTECTION STATUS REGISTER

Contextual Info: M95040 M95020, M95010 4/2/1 Kbit Serial SPI Bus EEPROM With High Speed Clock PRELIMINARY DATA • Compatible with SPI Bus Serial Interface Positive Clock SPI Modes ■ Single Supply Voltage: - 4.5V to 5.5V for M950x0 8 - 2.5V to 5.5V for M950x0-W - 1,8V to 3.6V for M950x0-R

17S08

Abstract: M95010 M95020 M95040 X101 X110 Scans-004035
Contextual Info: M95040 M95020, M95010 4/2/1 Kbit Serial SPI Bus EEPROM With High Speed Clock PRELIMINARY DATA • Compatible with SPI Bus Serial Interface Positive Clock SPI Modes ■ Single Supply Voltage: - 4.5V to 5.5V for M950x0 8 - 2.5V to 5.5V for M950x0-W - 1,8V to 3.6V for M950x0-R

Contextual Info: SERIAL ACCESS SPI BUS 4K 512x8 EEPROM • 100,000 ERASE/WRITE CYCLES ■ 10 YEARS DATA RETENTION ■ SINGLE 4.5V to 5.5V SUPPLY VOLTAGE ■ SPI BUS COMPATIBLE SERIAL INTERFACE ■ 2 MHz CLOCK RATE MAX - BLOCK WRITE PROTECTION ■ STATUS REGISTER - 16 BYTE PAGE MODE

Contextual Info: CMOS DUAL SyncFlFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1024x18 PRELIMINARY IDT72805LB IDT72815LB IDT72825LB • Enable puts output data bus in high impedance state • High-performance submicron CMOS technology • Available in a 121-lead, 1 6 x 1 6 mm plastic Ball Grid

ST95022

Contextual Info: ^7 SCS-THOMSON fc7 # » R an È M iiL iiE ra M D È t ST95022 2K SERIAL SPI EEPROM with HIGH SPEED CLOCK • HIGH SPEED CLOCK RATE: - 2.1 MHz Max ■ 1,000,000 ERASE/WRITE CYCLES ■ 40 YEARS DATA RETENTION ■ SINGLE 4.5V to 5.5V SUPPLY VOLTAGE ■ SPI BUS COMPATIBLE SERIAL INTERFACE

Contextual Info: PDSP16256/A @ M ITEL Programmable FIR Filter SE M IC O N D U C T O R A d v a n c e In form atio n Supersedes version in M edia Handbook, HB4599-1.0 O ctober 1996 The P D S P 1 6 2 5 6 c o n ta in s s ix te e n m u ltip lie r accumulators, which can be multi cycled to provide from 16 to

Contextual Info: Æ T * 7 # S C S -T H O M S O N . ST95020 IlO M ilL IO T M O tg S SERIAL ACCESS SPI BUS 2K 256 x 8 EEPROM • 100,000 ERASE/WRITE CYCLES ■ ■ ■ ■ ■ ■ 10 YEARS DATA RETENTION SINGLE 4.5V to 5.5V SUPPLY VOLTAGE SPI BUS COMPATIBLE SERIAL INTERFACE

TC74HC373P

Abstract: tr-5-t ssop40 TMP8237 TMP82C37A TMP82C37AM-5 TMP82C37AP-5 TMP82C37AT-5 TMP8237AP MPU85-207
Contextual Info: TO SH IBA TMP82C37A MULTIMODE DMA CONTROLLER TMP82C37AP-5/TMP82C37AM-5/TMP82C37AT-5 1. GENERAL DESCRIPTION The TM P82C37AP-5/AM -5/AT-5 h e re in a fte r referred to as TM P82C37A is a m ultim ode direct memory access (DMA) controller. The TM P82C37A im proves the

Contextual Info: > CYPRESS Features • Full 33V operation • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-8-chip operating frequencies up to 85 MHz — Input + logic cell + output delays under 7 ns • Unparalleled FPGA performance for counters, data path, state machines,

LMX1501

Abstract: MB1501 equivalent mb15xx MB1501
Contextual Info: AN-935 Upgrading from the MB150X to National LMX1501A: Replacement Issues National Semiconductor Application Note 935 ABSTRACT COMMON ELEMENTS Compatibility o f the LMX1501AM with the MB1501 std, and options H, an d L a n d MB1502 (in the FPT-16P-M06 pack­

Contextual Info: /T 7 SCS-THOMSON LI W iD gi ^ 7 # . ST95P08 R SERIAL ACCESS SPI BUS 8K (1K x 8 EEPROM • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 1 MILLION ERASE/WRITE CYCLES 40 YEARS DATA RETENTION SINGLE 3V to 5.5V SUPPLY VOLTAGE SPI BUS COMPATIBLE SERIAL INTERFACE 2 MHz CLOCK RATE MAX